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A Highly Integrated Analog Front-End for 3G
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A Highly Integrated Analog Front-End for 3G（免费）
IEEE 论文：
This paper describes a reconfigurable analog front-end (AFE) and audio Codec IC supporting the wideband code division multiple access (WCDMA) standard. The chip is fabricated on Intel’s 0.18- m (SOC) flash+logic+analog (FLA) process technology using a 0.35- m feature size analog transistor. The transmit path contains a 10-bit segmented rail-to-rail digital-to-analog converter, automatically tunable active RC filter,
and programmable gain amplifier (PGA) with self-tuning gain and offset correction circuit. The receive path incorporates a PGA, active RC filter, and an 8-bit analog-to-digital converter with built-in offset correction. The AFE operates at 2.7 V with a current consumption of 55 mA and total active area of 15 mm2.
A_Highly_Integrated_Analog_Front-End_for_3G.pdf :
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IEEE 论文：
This paper describes a reconfigurable analog front-end (AFE) and audio Codec IC supporting the wideband code division multiple access (WCDMA) standard. The chip is fabricated on Intel’s 0.18- m (SOC) flash+logic+analog (FLA) process technology using a 0.35- m feature size analog transistor. The transmit path contains a 10-bit segmented rail-to-rail digital-to-analog converter, automatically tunable active RC filter,
and programmable gain amplifier (PGA) with self-tuning gain and offset correction circuit. The receive path incorporates a PGA, active RC filter, and an 8-bit analog-to-digital converter with built-in offset correction. The AFE operates at 2.7 V with a current consumption of 55 mA and total active area of 15 mm2.
A_Highly_Integrated_Analog_Front-End_for_3G.pdf :
点击下载...
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