- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
CC1101接收不到数据的问题
录入：edatop.com 点击：
我用AVR M16控制一个CC1101不停发送数据10ms间隔 一个接受数据，出现的问题是接受方GDO0_H偶尔变高，但进入后接收到的字节长度为0，数据也为0，我采用的是可变地址长度+地址滤波+CRC，后来把地址滤波去掉还是如此，请教各位有没有遇到这种情况，谢谢。
/*****************************************************
Project :
Version :
Date : 2012-5-24
Author : Li
Company :
Comments:
Chip type : ATmega16L
Program type : Application
AVR Core Clock frequency: 8.000000 MHz
Memory model : Small
External RAM size : 0
Data Stack size : 256
*****************************************************/
#include <mega16.h>
#include <delay.h>
#define uchar unsigned char
#define uint unsigned int
/*手册上说读寄存器只需将寄存器地址的最高位设为1，写最高位为0（即为原来地址）
突发读写（连续）只需将第六位设为1 */
#define WRITE_BURST 0x40 //连续写入
#define READ_SINGLE 0x80 //读一次
#define READ_BURST 0xC0 //连续读
#define BYTES_IN_RXFIFO 0x7C //接受缓冲区中的有效字节数
#define CRC_OK 0x80 //CRC校验通过标志
#define GDO0 PORTA.0
#define GDO2 PORTA.2
#define MISO PORTB.6
#define MOSI PORTB.5
#define SCK PORTB.7
#define CSN PORTB.4
#define MISO_H (PINB&=(1<<6))
#define GDO0_H (PINA&=(1<<0))
#define GDO2_H (PINA&=(1<<2))
void SpiInit(void);
void CpuInit(void);
uchar SpiTxRxByte(uchar data);
void Reset_CC1101(void);
void PowerUp_Reset_CC1101(void);
void SpiWriteReg(uchar addr,uchar value);
void SpiWriteBurstReg(uchar addr,uchar *buffer,uchar count);
void SpiStrobe(uchar strobe);
uchar SpiReadReg(uchar addr);
void SpiReadBurstReg(uchar addr,uchar *buffer,uchar count);
void RfWriteRfSetting(void);
void RfSendPacket(uchar *txBuffer,uchar size);
uchar RfReceivePacket(uchar *rxBuffer,uchar length);
uchar PaTable[] ={0xC0, 0xC8, 0x85, 0x51, 0x3A, 0x06, 0x1C, 0x6C}; //功率表
// CC1101 STROBE, CONTROL AND STATUS REGSITER
#define CCxxx0_IOCFG2 0x00 // GDO2 output pin configuration
#define CCxxx0_IOCFG1 0x01 // GDO1 output pin configuration
#define CCxxx0_IOCFG0 0x02 // GDO0 output pin configuration
#define CCxxx0_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
#define CCxxx0_SYNC1 0x04 // Sync word, high INT8U
#define CCxxx0_SYNC0 0x05 // Sync word, low INT8U
#define CCxxx0_PKTLEN 0x06 // Packet length
#define CCxxx0_PKTCTRL1 0x07 // Packet automation control
#define CCxxx0_PKTCTRL0 0x08 // Packet automation control
#define CCxxx0_ADDR 0x09 // Device address
#define CCxxx0_CHANNR 0x0A // Channel number
#define CCxxx0_FSCTRL1 0x0B // Frequency synthesizer control
#define CCxxx0_FSCTRL0 0x0C // Frequency synthesizer control
#define CCxxx0_FREQ2 0x0D // Frequency control word, high INT8U
#define CCxxx0_FREQ1 0x0E // Frequency control word, middle INT8U
#define CCxxx0_FREQ0 0x0F // Frequency control word, low INT8U
#define CCxxx0_MDMCFG4 0x10 // Modem configuration
#define CCxxx0_MDMCFG3 0x11 // Modem configuration
#define CCxxx0_MDMCFG2 0x12 // Modem configuration
#define CCxxx0_MDMCFG1 0x13 // Modem configuration
#define CCxxx0_MDMCFG0 0x14 // Modem configuration
#define CCxxx0_DEVIATN 0x15 // Modem deviation setting
#define CCxxx0_MCSM2 0x16 // Main Radio Control State Machine configuration
#define CCxxx0_MCSM1 0x17 // Main Radio Control State Machine configuration
#define CCxxx0_MCSM0 0x18 // Main Radio Control State Machine configuration
#define CCxxx0_FOCCFG 0x19 // Frequency Offset Compensation configuration
#define CCxxx0_BSCFG 0x1A // Bit Synchronization configuration
#define CCxxx0_AGCCTRL2 0x1B // AGC control
#define CCxxx0_AGCCTRL1 0x1C // AGC control
#define CCxxx0_AGCCTRL0 0x1D // AGC control
#define CCxxx0_WOREVT1 0x1E // High INT8U Event 0 timeout
#define CCxxx0_WOREVT0 0x1F // Low INT8U Event 0 timeout
#define CCxxx0_WORCTRL 0x20 // Wake On Radio control
#define CCxxx0_FREND1 0x21 // Front end RX configuration
#define CCxxx0_FREND0 0x22 // Front end TX configuration
#define CCxxx0_FSCAL3 0x23 // Frequency synthesizer calibration
#define CCxxx0_FSCAL2 0x24 // Frequency synthesizer calibration
#define CCxxx0_FSCAL1 0x25 // Frequency synthesizer calibration
#define CCxxx0_FSCAL0 0x26 // Frequency synthesizer calibration
#define CCxxx0_RCCTRL1 0x27 // RC oscillator configuration
#define CCxxx0_RCCTRL0 0x28 // RC oscillator configuration
#define CCxxx0_FSTEST 0x29 // Frequency synthesizer calibration control
#define CCxxx0_PTEST 0x2A // Production test
#define CCxxx0_AGCTEST 0x2B // AGC test
#define CCxxx0_TEST2 0x2C // Various test settings
#define CCxxx0_TEST1 0x2D // Various test settings
#define CCxxx0_TEST0 0x2E // Various test settings
//状态寄存器定义
#define CCxxx0_PARTNUM 0x30
#define CCxxx0_VERSION 0x31
#define CCxxx0_FREQEST 0x32
#define CCxxx0_LQI 0x33
#define CCxxx0_RSSI 0x34
#define CCxxx0_MARCSTATE 0x35
#define CCxxx0_WORTIME1 0x36
#define CCxxx0_WORTIME0 0x37
#define CCxxx0_PKTSTATUS 0x38
#define CCxxx0_VCO_VC_DAC 0x39
#define CCxxx0_TXBYTES 0x3A
#define CCxxx0_RXBYTES 0x3B
#define CCxxx0_PATABLE 0x3E
#define CCxxx0_TXFIFO 0x3F
#define CCxxx0_RXFIFO 0x3F
// Strobe commands 滤波命令
#define CCxxx0_SRES 0x30 // Reset chip.
#define CCxxx0_SFSTXON 0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
// If in RX/TX: Go to a wait state where only the synthesizer is
// running (for quick RX / TX turnaround).
#define CCxxx0_SXOFF 0x32 // Turn off crystal oscillator.
#define CCxxx0_SCAL 0x33 // Calibrate frequency synthesizer and turn it off
// (enables quick start).
#define CCxxx0_SRX 0x34 // Enable RX. Perform calibration first if coming from IDLE and
// MCSM0.FS_AUTOCAL=1.
#define CCxxx0_STX 0x35 // In IDLE state: Enable TX. Perform calibration first if
// MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
// Only go to TX if channel is clear.
#define CCxxx0_SIDLE 0x36 // Exit RX / TX, turn off frequency synthesizer and exit
// Wake-On-Radio mode if applicable.
#define CCxxx0_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
#define CCxxx0_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
#define CCxxx0_SPWD 0x39 // Enter power down mode when CSn goes high.
#define CCxxx0_SFRX 0x3A // Flush the RX FIFO buffer.
#define CCxxx0_SFTX 0x3B // Flush the TX FIFO buffer.
#define CCxxx0_SWORRST 0x3C // Reset real time clock.
#define CCxxx0_SNOP 0x3D // No operation. May be used to pad strobe commands to two
// INT8Us for simpler software.
// RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers
typedef struct S_RF_SETTINGS
{
uint FSCTRL1; // Frequency synthesizer control.
uint FSCTRL0; // Frequency synthesizer control.
uint FREQ2; // Frequency control word, high INT8U.
uint FREQ1; // Frequency control word, middle INT8U.
uint FREQ0; // Frequency control word, low INT8U.
uint MDMCFG4; // Modem configuration.
uint MDMCFG3; // Modem configuration.
uint MDMCFG2; // Modem configuration.
uint MDMCFG1; // Modem configuration.
uint MDMCFG0; // Modem configuration.
uint CHANNR; // Channel number.
uint DEVIATN; // Modem deviation setting (when FSK modulation is enabled).
uint FREND1; // Front end RX configuration.
uint FREND0; // Front end RX configuration.
uint MCSM0; // Main Radio Control State Machine configuration.
uint FOCCFG; // Frequency Offset Compensation Configuration.
uint BSCFG; // Bit synchronization Configuration.
uint AGCCTRL2; // AGC control.
uint AGCCTRL1; // AGC control.
uint AGCCTRL0; // AGC control.
uint FSCAL3; // Frequency synthesizer calibration.
uint FSCAL2; // Frequency synthesizer calibration.
uint FSCAL1; // Frequency synthesizer calibration.
uint FSCAL0; // Frequency synthesizer calibration.
uint FSTEST; // Frequency synthesizer calibration control
uint TEST2; // Various test settings.
uint TEST1; // Various test settings.
uint TEST0; // Various test settings.
uint IOCFG2; // GDO2 output pin configuration
uint IOCFG0; // GDO0 output pin configuration
uint PKTCTRL1; // Packet automation control.
uint PKTCTRL0; // Packet automation control.
uint ADDR; // Device address.
uint PKTLEN; // Packet length.
} RF_SETTINGS;
/////////////////////////////////////////////////////////////////
//下面的值来自于软件自动计算模式为简单模式 Generic 434Mhz low data rate 2.4k 其他选项默认
const RF_SETTINGS rfSettings =
{
0x0B, // FSCTRL1 Frequency synthesizer control.
0x00, // FSCTRL0 Frequency synthesizer control. 应该是确定频率跳帧
0x10, // FREQ2 Frequency control word, high byte.
0xA7, // FREQ1 Frequency control word, middle byte.
0x62, // FREQ0 Frequency control word, low byte. 确定基准频率432MHZ
0x2D, // MDMCFG4 Modem configuration.
0x3B, // MDMCFG3 Modem configuration.
0x73, // MDMCFG2 Modem configuration.
0x22, // MDMCFG1 Modem configuration.
0xF8, // MDMCFG0 Modem configuration. 调制解调器配置
0x00, // CHANNR Channel number.
0x00, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
0xB6, // FREND1 Front end RX configuration.
0x10, // FREND0 Front end RX configuration. 功率
0x18, // MCSM0 Main Radio Control State Machine configuration. 校准设置
0x1D, // FOCCFG Frequency Offset Compensation Configuration.频率偏移补偿
0x1C, // BSCFG Bit synchronization Configuration. 同步字配置
0xC7, // AGCCTRL2 AGC control.
0x00, // AGCCTRL1 AGC control.
0xB2, // AGCCTRL0 AGC control.
0xEA, // FSCAL3 Frequency synthesizer calibration.
0x0A, // FSCAL2 Frequency synthesizer calibration.
0x00, // FSCAL1 Frequency synthesizer calibration.
0x11, // FSCAL0 Frequency synthesizer calibration.
0x59, // FSTEST Frequency synthesizer calibration.
0x88, // TEST2 Various test settings.
0x31, // TEST1 Various test settings.
0x0B, // TEST0 Various test settings.
0x0B, // IOCFG2 GDO2 output pin configuration.这里应该只是用到了GDO0所以GDO2的配置无所谓
0x06, // IOCFG0 GDO0 output pin configuration. 发送/接受到同步字时GDO0置位，并在数据包的末尾取消置位
0x05, // PKTCTRL1 Packet automation control. 加入2个状态字节 地址校验 无广播
0x05, // PKTCTRL0 Packet automation control. CRC校验开启 可变的数据包长度模式
0x01, // ADDR Device address.
0xFF // PKTLEN Packet length.
};
void SpiInit(void) //使用SPI 要将CSN拉低
{
SPCR=0x50; //主机模式 模式0 使能SPI
SPSR=0x00; //MSB在前 SPI时钟2MHZ
}
void CpuInit(void)
{
SpiInit();
delay_ms(10);
}
uchar SpiTxRxByte(uchar data)
{
uchar temp;
SPDR=data;
while(！(SPSR&(1<<SPIF))); //等待发送完成
temp=SPDR; //读取送机发送来的数据
return temp;
}
void Reset_CC1101(void)
{
CSN=0; //拉低准备进行SPI
while(MISO_H); //等待CC110响应（CC1101的SO变低）
SpiTxRxByte(CCxxx0_SRES); //发送复位命令
while(MISO_H); //再次变低 复位完成 进入idle状态
CSN=1; //结束使能
}
void PowerUp_Reset_CC1101(void)
{
CSN=1;
SCK=1;
MOSI=0;
delay_us(1);
CSN=0;
delay_us(1);
CSN=1;
delay_us(80);
SCK=0;
Reset_CC1101();
}
void SpiWriteReg(uchar addr,uchar value) //写内容到寄存器
{
CSN=0;
while(MISO_H);
SpiTxRxByte(addr); //写地址
delay_us(10);
SpiTxRxByte(value); //写入内容
CSN=1;
}
//SPI连续写入配置寄存器
void SpiWriteBurstReg(uchar addr,uchar *buffer,uchar count)
{
uchar i,temp;
temp=addr|WRITE_BURST;
CSN=0;
while(MISO_H);
SpiTxRxByte(temp);
for(i=0;i<count;i++)
{
SpiTxRxByte(buffer[i]);
}
CSN=1;
}
void SpiStrobe(uchar strobe) //SPI命令写入
{
CSN=0;
while(MISO_H);
SpiTxRxByte(strobe);
CSN=1;
}
/
uchar SpiReadReg(uchar addr) //读一个寄存器内容
{
uchar temp,value;
temp=addr|READ_SINGLE; //读寄存器命令
CSN=0;
while(MISO_H);
SpiTxRxByte(temp);
value=SpiTxRxByte(0x00); //这里发送什么数据即可（验证）
CSN=1;
return value;
}
void SpiReadBurstReg(uchar addr,uchar *buffer,uchar count)
{
uchar i,temp;
temp=addr|READ_BURST;
CSN=0;
while(MISO_H);
SpiTxRxByte(temp);
for(i=0;i<count;i++)
{
buffer[i]=SpiTxRxByte(0x00); //读出来的内容存在buffer中
}
CSN=1;
}
void RfWriteRfSetting(void) //配置CC1101
{
SpiWriteReg(CCxxx0_FSCTRL1, rfSettings.FSCTRL1);
SpiWriteReg(CCxxx0_FSCTRL0, rfSettings.FSCTRL0);
SpiWriteReg(CCxxx0_FREQ2, rfSettings.FREQ2);
SpiWriteReg(CCxxx0_FREQ1, rfSettings.FREQ1);
SpiWriteReg(CCxxx0_FREQ0, rfSettings.FREQ0);
SpiWriteReg(CCxxx0_MDMCFG4, rfSettings.MDMCFG4);
SpiWriteReg(CCxxx0_MDMCFG3, rfSettings.MDMCFG3);
SpiWriteReg(CCxxx0_MDMCFG2, rfSettings.MDMCFG2);
SpiWriteReg(CCxxx0_MDMCFG1, rfSettings.MDMCFG1);
SpiWriteReg(CCxxx0_MDMCFG0, rfSettings.MDMCFG0);
SpiWriteReg(CCxxx0_CHANNR, rfSettings.CHANNR);
SpiWriteReg(CCxxx0_DEVIATN, rfSettings.DEVIATN);
SpiWriteReg(CCxxx0_FREND1, rfSettings.FREND1);
SpiWriteReg(CCxxx0_FREND0, rfSettings.FREND0);
SpiWriteReg(CCxxx0_MCSM0 , rfSettings.MCSM0 );
SpiWriteReg(CCxxx0_FOCCFG, rfSettings.FOCCFG);
SpiWriteReg(CCxxx0_BSCFG, rfSettings.BSCFG);
SpiWriteReg(CCxxx0_AGCCTRL2, rfSettings.AGCCTRL2);
SpiWriteReg(CCxxx0_AGCCTRL1, rfSettings.AGCCTRL1);
SpiWriteReg(CCxxx0_AGCCTRL0, rfSettings.AGCCTRL0);
SpiWriteReg(CCxxx0_FSCAL3, rfSettings.FSCAL3);
SpiWriteReg(CCxxx0_FSCAL2, rfSettings.FSCAL2);
SpiWriteReg(CCxxx0_FSCAL1, rfSettings.FSCAL1);
SpiWriteReg(CCxxx0_FSCAL0, rfSettings.FSCAL0);
SpiWriteReg(CCxxx0_FSTEST, rfSettings.FSTEST);
SpiWriteReg(CCxxx0_TEST2, rfSettings.TEST2);
SpiWriteReg(CCxxx0_TEST1, rfSettings.TEST1);
SpiWriteReg(CCxxx0_TEST0, rfSettings.TEST0);
SpiWriteReg(CCxxx0_IOCFG2, rfSettings.IOCFG2);
SpiWriteReg(CCxxx0_IOCFG0, rfSettings.IOCFG0);
SpiWriteReg(CCxxx0_PKTCTRL1, rfSettings.PKTCTRL1);
SpiWriteReg(CCxxx0_PKTCTRL0, rfSettings.PKTCTRL0);
SpiWriteReg(CCxxx0_ADDR, rfSettings.ADDR);
SpiWriteReg(CCxxx0_PKTLEN, rfSettings.PKTLEN);
}
void RfSendPacket(uchar *txbuffer,uchar size) //CC1101发送一组数据
{
uchar i;
SpiWriteReg(CCxxx0_TXFIFO,size);
//这里要加入目标的地址
SpiWriteBurstReg(CCxxx0_TXFIFO,txbuffer,size); //写入要发送的数据
SpiStrobe(CCxxx0_STX); //进入发送模式发送数据
i=0;
while(！GDO0_H) //发送到同步字时置位
{
if(i>10) //限时等待
break;
delay_ms(1);
i++;
}
i=0;
while(GDO0_H) //发送到数据末尾取消置位
{
if(i>10)
break;
delay_ms(1);
i++;
}
delay_ms(1);
SpiStrobe(CCxxx0_SFTX); //刷新发送FIFO
SpiStrobe(CCxxx0_SIDLE);
}
//接受一组数据 函数要改进
uchar RfReceivePacket(uchar *rxbuffer,uchar length)
{
uchar status[2];
uchar size=0;
delay_ms(1);
size=SpiReadReg(CCxxx0_RXFIFO); //接受到得数据长度
if(size<length)
{
SpiReadBurstReg(CCxxx0_RXFIFO,rxbuffer,size);
SpiReadBurstReg(CCxxx0_RXFIFO,status,2);
}
SpiStrobe(CCxxx0_SFRX); //刷新接受缓冲区
return (status[1]&CRC_OK);
}
// Declare your global variables here
uchar TxBuffer[8]={0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08};
uchar RxBuffer[10];
void main(void)
{
// Declare your local variables here
uchar temp;
PORTA=0x00;
DDRA=0x00;
PORTB=0x10; //CSN输出高电平 不使能
DDRB=0x0B; // MOSI SCK输出低电平
PORTC=0x00;
DDRC=0x00;
PORTD=0x00;
DDRD=0x00;
CpuInit();
PowerUp_Reset_CC1101();
RfWriteRfSetting();
SpiWriteBurstReg(CCxxx0_PATABLE,PaTable,8);
SpiStrobe(CCxxx0_SIDLE);
SpiStrobe(CCxxx0_SRX); //进入接受状态
while (1)
{
// Place your code here
if(GDO0_H)
{
temp=RfReceivePacket(RxBuffer,10);
if(temp)
{
SpiStrobe(CCxxx0_SIDLE);
SpiStrobe(CCxxx0_SRX); //进入接受状态
}
}
}
}
/*****************************************************
Project :
Version :
Date : 2012-5-24
Author : Li
Company :
Comments:
Chip type : ATmega16L
Program type : Application
AVR Core Clock frequency: 8.000000 MHz
Memory model : Small
External RAM size : 0
Data Stack size : 256
*****************************************************/
#include <mega16.h>
#include <delay.h>
#define uchar unsigned char
#define uint unsigned int
/*手册上说读寄存器只需将寄存器地址的最高位设为1，写最高位为0（即为原来地址）
突发读写（连续）只需将第六位设为1 */
#define WRITE_BURST 0x40 //连续写入
#define READ_SINGLE 0x80 //读一次
#define READ_BURST 0xC0 //连续读
#define BYTES_IN_RXFIFO 0x7C //接受缓冲区中的有效字节数
#define CRC_OK 0x80 //CRC校验通过标志
#define GDO0 PORTA.0
#define GDO2 PORTA.2
#define MISO PORTB.6
#define MOSI PORTB.5
#define SCK PORTB.7
#define CSN PORTB.4
#define MISO_H (PINB&=(1<<6))
#define GDO0_H (PINA&=(1<<0))
#define GDO2_H (PINA&=(1<<2))
void SpiInit(void);
void CpuInit(void);
uchar SpiTxRxByte(uchar data);
void Reset_CC1101(void);
void PowerUp_Reset_CC1101(void);
void SpiWriteReg(uchar addr,uchar value);
void SpiWriteBurstReg(uchar addr,uchar *buffer,uchar count);
void SpiStrobe(uchar strobe);
uchar SpiReadReg(uchar addr);
void SpiReadBurstReg(uchar addr,uchar *buffer,uchar count);
void RfWriteRfSetting(void);
void RfSendPacket(uchar *txBuffer,uchar size);
uchar RfReceivePacket(uchar *rxBuffer,uchar length);
uchar PaTable[] ={0xC0, 0xC8, 0x85, 0x51, 0x3A, 0x06, 0x1C, 0x6C}; //功率表
// CC1101 STROBE, CONTROL AND STATUS REGSITER
#define CCxxx0_IOCFG2 0x00 // GDO2 output pin configuration
#define CCxxx0_IOCFG1 0x01 // GDO1 output pin configuration
#define CCxxx0_IOCFG0 0x02 // GDO0 output pin configuration
#define CCxxx0_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
#define CCxxx0_SYNC1 0x04 // Sync word, high INT8U
#define CCxxx0_SYNC0 0x05 // Sync word, low INT8U
#define CCxxx0_PKTLEN 0x06 // Packet length
#define CCxxx0_PKTCTRL1 0x07 // Packet automation control
#define CCxxx0_PKTCTRL0 0x08 // Packet automation control
#define CCxxx0_ADDR 0x09 // Device address
#define CCxxx0_CHANNR 0x0A // Channel number
#define CCxxx0_FSCTRL1 0x0B // Frequency synthesizer control
#define CCxxx0_FSCTRL0 0x0C // Frequency synthesizer control
#define CCxxx0_FREQ2 0x0D // Frequency control word, high INT8U
#define CCxxx0_FREQ1 0x0E // Frequency control word, middle INT8U
#define CCxxx0_FREQ0 0x0F // Frequency control word, low INT8U
#define CCxxx0_MDMCFG4 0x10 // Modem configuration
#define CCxxx0_MDMCFG3 0x11 // Modem configuration
#define CCxxx0_MDMCFG2 0x12 // Modem configuration
#define CCxxx0_MDMCFG1 0x13 // Modem configuration
#define CCxxx0_MDMCFG0 0x14 // Modem configuration
#define CCxxx0_DEVIATN 0x15 // Modem deviation setting
#define CCxxx0_MCSM2 0x16 // Main Radio Control State Machine configuration
#define CCxxx0_MCSM1 0x17 // Main Radio Control State Machine configuration
#define CCxxx0_MCSM0 0x18 // Main Radio Control State Machine configuration
#define CCxxx0_FOCCFG 0x19 // Frequency Offset Compensation configuration
#define CCxxx0_BSCFG 0x1A // Bit Synchronization configuration
#define CCxxx0_AGCCTRL2 0x1B // AGC control
#define CCxxx0_AGCCTRL1 0x1C // AGC control
#define CCxxx0_AGCCTRL0 0x1D // AGC control
#define CCxxx0_WOREVT1 0x1E // High INT8U Event 0 timeout
#define CCxxx0_WOREVT0 0x1F // Low INT8U Event 0 timeout
#define CCxxx0_WORCTRL 0x20 // Wake On Radio control
#define CCxxx0_FREND1 0x21 // Front end RX configuration
#define CCxxx0_FREND0 0x22 // Front end TX configuration
#define CCxxx0_FSCAL3 0x23 // Frequency synthesizer calibration
#define CCxxx0_FSCAL2 0x24 // Frequency synthesizer calibration
#define CCxxx0_FSCAL1 0x25 // Frequency synthesizer calibration
#define CCxxx0_FSCAL0 0x26 // Frequency synthesizer calibration
#define CCxxx0_RCCTRL1 0x27 // RC oscillator configuration
#define CCxxx0_RCCTRL0 0x28 // RC oscillator configuration
#define CCxxx0_FSTEST 0x29 // Frequency synthesizer calibration control
#define CCxxx0_PTEST 0x2A // Production test
#define CCxxx0_AGCTEST 0x2B // AGC test
#define CCxxx0_TEST2 0x2C // Various test settings
#define CCxxx0_TEST1 0x2D // Various test settings
#define CCxxx0_TEST0 0x2E // Various test settings
//状态寄存器定义
#define CCxxx0_PARTNUM 0x30
#define CCxxx0_VERSION 0x31
#define CCxxx0_FREQEST 0x32
#define CCxxx0_LQI 0x33
#define CCxxx0_RSSI 0x34
#define CCxxx0_MARCSTATE 0x35
#define CCxxx0_WORTIME1 0x36
#define CCxxx0_WORTIME0 0x37
#define CCxxx0_PKTSTATUS 0x38
#define CCxxx0_VCO_VC_DAC 0x39
#define CCxxx0_TXBYTES 0x3A
#define CCxxx0_RXBYTES 0x3B
#define CCxxx0_PATABLE 0x3E
#define CCxxx0_TXFIFO 0x3F
#define CCxxx0_RXFIFO 0x3F
// Strobe commands 滤波命令
#define CCxxx0_SRES 0x30 // Reset chip.
#define CCxxx0_SFSTXON 0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
// If in RX/TX: Go to a wait state where only the synthesizer is
// running (for quick RX / TX turnaround).
#define CCxxx0_SXOFF 0x32 // Turn off crystal oscillator.
#define CCxxx0_SCAL 0x33 // Calibrate frequency synthesizer and turn it off
// (enables quick start).
#define CCxxx0_SRX 0x34 // Enable RX. Perform calibration first if coming from IDLE and
// MCSM0.FS_AUTOCAL=1.
#define CCxxx0_STX 0x35 // In IDLE state: Enable TX. Perform calibration first if
// MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
// Only go to TX if channel is clear.
#define CCxxx0_SIDLE 0x36 // Exit RX / TX, turn off frequency synthesizer and exit
// Wake-On-Radio mode if applicable.
#define CCxxx0_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
#define CCxxx0_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
#define CCxxx0_SPWD 0x39 // Enter power down mode when CSn goes high.
#define CCxxx0_SFRX 0x3A // Flush the RX FIFO buffer.
#define CCxxx0_SFTX 0x3B // Flush the TX FIFO buffer.
#define CCxxx0_SWORRST 0x3C // Reset real time clock.
#define CCxxx0_SNOP 0x3D // No operation. May be used to pad strobe commands to two
// INT8Us for simpler software.
// RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers
typedef struct S_RF_SETTINGS
{
uint FSCTRL1; // Frequency synthesizer control.
uint FSCTRL0; // Frequency synthesizer control.
uint FREQ2; // Frequency control word, high INT8U.
uint FREQ1; // Frequency control word, middle INT8U.
uint FREQ0; // Frequency control word, low INT8U.
uint MDMCFG4; // Modem configuration.
uint MDMCFG3; // Modem configuration.
uint MDMCFG2; // Modem configuration.
uint MDMCFG1; // Modem configuration.
uint MDMCFG0; // Modem configuration.
uint CHANNR; // Channel number.
uint DEVIATN; // Modem deviation setting (when FSK modulation is enabled).
uint FREND1; // Front end RX configuration.
uint FREND0; // Front end RX configuration.
uint MCSM0; // Main Radio Control State Machine configuration.
uint FOCCFG; // Frequency Offset Compensation Configuration.
uint BSCFG; // Bit synchronization Configuration.
uint AGCCTRL2; // AGC control.
uint AGCCTRL1; // AGC control.
uint AGCCTRL0; // AGC control.
uint FSCAL3; // Frequency synthesizer calibration.
uint FSCAL2; // Frequency synthesizer calibration.
uint FSCAL1; // Frequency synthesizer calibration.
uint FSCAL0; // Frequency synthesizer calibration.
uint FSTEST; // Frequency synthesizer calibration control
uint TEST2; // Various test settings.
uint TEST1; // Various test settings.
uint TEST0; // Various test settings.
uint IOCFG2; // GDO2 output pin configuration
uint IOCFG0; // GDO0 output pin configuration
uint PKTCTRL1; // Packet automation control.
uint PKTCTRL0; // Packet automation control.
uint ADDR; // Device address.
uint PKTLEN; // Packet length.
} RF_SETTINGS;
/////////////////////////////////////////////////////////////////
//下面的值来自于软件自动计算模式为简单模式 Generic 434Mhz low data rate 2.4k 其他选项默认
const RF_SETTINGS rfSettings =
{
0x0B, // FSCTRL1 Frequency synthesizer control.
0x00, // FSCTRL0 Frequency synthesizer control. 应该是确定频率跳帧
0x10, // FREQ2 Frequency control word, high byte.
0xA7, // FREQ1 Frequency control word, middle byte.
0x62, // FREQ0 Frequency control word, low byte. 确定基准频率432MHZ
0x2D, // MDMCFG4 Modem configuration.
0x3B, // MDMCFG3 Modem configuration.
0x73, // MDMCFG2 Modem configuration.
0x22, // MDMCFG1 Modem configuration.
0xF8, // MDMCFG0 Modem configuration. 调制解调器配置
0x00, // CHANNR Channel number.
0x00, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
0xB6, // FREND1 Front end RX configuration.
0x10, // FREND0 Front end RX configuration. 功率
0x18, // MCSM0 Main Radio Control State Machine configuration. 校准设置
0x1D, // FOCCFG Frequency Offset Compensation Configuration.频率偏移补偿
0x1C, // BSCFG Bit synchronization Configuration. 同步字配置
0xC7, // AGCCTRL2 AGC control.
0x00, // AGCCTRL1 AGC control.
0xB2, // AGCCTRL0 AGC control.
0xEA, // FSCAL3 Frequency synthesizer calibration.
0x0A, // FSCAL2 Frequency synthesizer calibration.
0x00, // FSCAL1 Frequency synthesizer calibration.
0x11, // FSCAL0 Frequency synthesizer calibration.
0x59, // FSTEST Frequency synthesizer calibration.
0x88, // TEST2 Various test settings.
0x31, // TEST1 Various test settings.
0x0B, // TEST0 Various test settings.
0x0B, // IOCFG2 GDO2 output pin configuration.这里应该只是用到了GDO0所以GDO2的配置无所谓
0x06, // IOCFG0 GDO0 output pin configuration. 发送/接受到同步字时GDO0置位，并在数据包的末尾取消置位
0x05, // PKTCTRL1 Packet automation control. 加入2个状态字节 地址校验 无广播
0x05, // PKTCTRL0 Packet automation control. CRC校验开启 可变的数据包长度模式
0x01, // ADDR Device address.
0xFF // PKTLEN Packet length.
};
void SpiInit(void) //使用SPI 要将CSN拉低
{
SPCR=0x50; //主机模式 模式0 使能SPI
SPSR=0x00; //MSB在前 SPI时钟2MHZ
}
void CpuInit(void)
{
SpiInit();
delay_ms(10);
}
uchar SpiTxRxByte(uchar data)
{
uchar temp;
SPDR=data;
while(！(SPSR&(1<<SPIF))); //等待发送完成
temp=SPDR; //读取送机发送来的数据
return temp;
}
void Reset_CC1101(void)
{
CSN=0; //拉低准备进行SPI
while(MISO_H); //等待CC110响应（CC1101的SO变低）
SpiTxRxByte(CCxxx0_SRES); //发送复位命令
while(MISO_H); //再次变低 复位完成 进入idle状态
CSN=1; //结束使能
}
void PowerUp_Reset_CC1101(void)
{
CSN=1;
SCK=1;
MOSI=0;
delay_us(1);
CSN=0;
delay_us(1);
CSN=1;
delay_us(80);
SCK=0;
Reset_CC1101();
}
void SpiWriteReg(uchar addr,uchar value) //写内容到寄存器
{
CSN=0;
while(MISO_H);
SpiTxRxByte(addr); //写地址
delay_us(10);
SpiTxRxByte(value); //写入内容
CSN=1;
}
//SPI连续写入配置寄存器
void SpiWriteBurstReg(uchar addr,uchar *buffer,uchar count)
{
uchar i,temp;
temp=addr|WRITE_BURST;
CSN=0;
while(MISO_H);
SpiTxRxByte(temp);
for(i=0;i<count;i++)
{
SpiTxRxByte(buffer[i]);
}
CSN=1;
}
void SpiStrobe(uchar strobe) //SPI命令写入
{
CSN=0;
while(MISO_H);
SpiTxRxByte(strobe);
CSN=1;
}
/
uchar SpiReadReg(uchar addr) //读一个寄存器内容
{
uchar temp,value;
temp=addr|READ_SINGLE; //读寄存器命令
CSN=0;
while(MISO_H);
SpiTxRxByte(temp);
value=SpiTxRxByte(0x00); //这里发送什么数据即可（验证）
CSN=1;
return value;
}
void SpiReadBurstReg(uchar addr,uchar *buffer,uchar count)
{
uchar i,temp;
temp=addr|READ_BURST;
CSN=0;
while(MISO_H);
SpiTxRxByte(temp);
for(i=0;i<count;i++)
{
buffer[i]=SpiTxRxByte(0x00); //读出来的内容存在buffer中
}
CSN=1;
}
void RfWriteRfSetting(void) //配置CC1101
{
SpiWriteReg(CCxxx0_FSCTRL1, rfSettings.FSCTRL1);
SpiWriteReg(CCxxx0_FSCTRL0, rfSettings.FSCTRL0);
SpiWriteReg(CCxxx0_FREQ2, rfSettings.FREQ2);
SpiWriteReg(CCxxx0_FREQ1, rfSettings.FREQ1);
SpiWriteReg(CCxxx0_FREQ0, rfSettings.FREQ0);
SpiWriteReg(CCxxx0_MDMCFG4, rfSettings.MDMCFG4);
SpiWriteReg(CCxxx0_MDMCFG3, rfSettings.MDMCFG3);
SpiWriteReg(CCxxx0_MDMCFG2, rfSettings.MDMCFG2);
SpiWriteReg(CCxxx0_MDMCFG1, rfSettings.MDMCFG1);
SpiWriteReg(CCxxx0_MDMCFG0, rfSettings.MDMCFG0);
SpiWriteReg(CCxxx0_CHANNR, rfSettings.CHANNR);
SpiWriteReg(CCxxx0_DEVIATN, rfSettings.DEVIATN);
SpiWriteReg(CCxxx0_FREND1, rfSettings.FREND1);
SpiWriteReg(CCxxx0_FREND0, rfSettings.FREND0);
SpiWriteReg(CCxxx0_MCSM0 , rfSettings.MCSM0 );
SpiWriteReg(CCxxx0_FOCCFG, rfSettings.FOCCFG);
SpiWriteReg(CCxxx0_BSCFG, rfSettings.BSCFG);
SpiWriteReg(CCxxx0_AGCCTRL2, rfSettings.AGCCTRL2);
SpiWriteReg(CCxxx0_AGCCTRL1, rfSettings.AGCCTRL1);
SpiWriteReg(CCxxx0_AGCCTRL0, rfSettings.AGCCTRL0);
SpiWriteReg(CCxxx0_FSCAL3, rfSettings.FSCAL3);
SpiWriteReg(CCxxx0_FSCAL2, rfSettings.FSCAL2);
SpiWriteReg(CCxxx0_FSCAL1, rfSettings.FSCAL1);
SpiWriteReg(CCxxx0_FSCAL0, rfSettings.FSCAL0);
SpiWriteReg(CCxxx0_FSTEST, rfSettings.FSTEST);
SpiWriteReg(CCxxx0_TEST2, rfSettings.TEST2);
SpiWriteReg(CCxxx0_TEST1, rfSettings.TEST1);
SpiWriteReg(CCxxx0_TEST0, rfSettings.TEST0);
SpiWriteReg(CCxxx0_IOCFG2, rfSettings.IOCFG2);
SpiWriteReg(CCxxx0_IOCFG0, rfSettings.IOCFG0);
SpiWriteReg(CCxxx0_PKTCTRL1, rfSettings.PKTCTRL1);
SpiWriteReg(CCxxx0_PKTCTRL0, rfSettings.PKTCTRL0);
SpiWriteReg(CCxxx0_ADDR, rfSettings.ADDR);
SpiWriteReg(CCxxx0_PKTLEN, rfSettings.PKTLEN);
}
void RfSendPacket(uchar *txbuffer,uchar size) //CC1101发送一组数据
{
uchar i;
SpiWriteReg(CCxxx0_TXFIFO,size);
//这里要加入目标的地址
SpiWriteBurstReg(CCxxx0_TXFIFO,txbuffer,size); //写入要发送的数据
SpiStrobe(CCxxx0_STX); //进入发送模式发送数据
i=0;
while(！GDO0_H) //发送到同步字时置位
{
if(i>10) //限时等待
break;
delay_ms(1);
i++;
}
i=0;
while(GDO0_H) //发送到数据末尾取消置位
{
if(i>10)
break;
delay_ms(1);
i++;
}
delay_ms(1);
SpiStrobe(CCxxx0_SFTX); //刷新发送FIFO
SpiStrobe(CCxxx0_SIDLE);
}
//接受一组数据 函数要改进
uchar RfReceivePacket(uchar *rxbuffer,uchar length)
{
uchar status[2];
uchar size=0;
delay_ms(1);
size=SpiReadReg(CCxxx0_RXFIFO); //接受到得数据长度
if(size<length)
{
SpiReadBurstReg(CCxxx0_RXFIFO,rxbuffer,size);
SpiReadBurstReg(CCxxx0_RXFIFO,status,2);
}
SpiStrobe(CCxxx0_SFRX); //刷新接受缓冲区
return (status[1]&CRC_OK);
}
// Declare your global variables here
uchar TxBuffer[8]={0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08};
uchar RxBuffer[10];
void main(void)
{
// Declare your local variables here
uchar temp;
PORTA=0x00;
DDRA=0x00;
PORTB=0x10; //CSN输出高电平 不使能
DDRB=0x0B; // MOSI SCK输出低电平
PORTC=0x00;
DDRC=0x00;
PORTD=0x00;
DDRD=0x00;
CpuInit();
PowerUp_Reset_CC1101();
RfWriteRfSetting();
SpiWriteBurstReg(CCxxx0_PATABLE,PaTable,8);
SpiStrobe(CCxxx0_SIDLE);
SpiStrobe(CCxxx0_SRX); //进入接受状态
while (1)
{
// Place your code here
if(GDO0_H)
{
temp=RfReceivePacket(RxBuffer,10);
if(temp)
{
SpiStrobe(CCxxx0_SIDLE);
SpiStrobe(CCxxx0_SRX); //进入接受状态
}
}
}
}
我QQ825014522 讨论下啊 我用51 也实现不了啊啊
我多字节发送，接收不正确···不知道你们弄得么杨了现在?求指导
也曾遇到这样问题
