hspice网表仿真问题求助
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近期试着用hspice设计一个理想的8-BITADC模型，仿真结果显示如下：大概就是没有该开关模型定义?请问该怎么解决呢?
****** HSPICE -- A-2008.03-SP1 32-BIT (May 26 2008) winnt ******
Copyright (C) 2008 Synopsys, Inc. All Rights Reserved.
Unpublished-rights reserved under US copyright laws.
This program is protected by law and is subject to the
terms and conditions of the license agreement found in:
C:\synopsys\Hspice_A-2008.03-SP1\license.warn
Use of this program is your acceptance to be bound by this
license agreement. HSPICE is the trademark of Synopsys, Inc.
Input File: c:\users\tao\desktop\8bit ideal adc.sp
Init: read install configuration file: C:\synopsys\Hspice_A-2008.03-SP1\meta.cfg
Init: hspice initialization file: C:\synopsys\Hspice_A-2008.03-SP1\hspice.ini
*定义输出处理
.option post accurate probe
.probe v(vdd) v(vref+) v(vref-) v(vin) v(b7) v(b6)
+v(b5) v(b4) v(b3) v(b2) v(b1) v(b0) v(clock)
*定义控制源
vvdd vdd 0 dc 1.5
vvref+ vref+ 0 dc 1.5
vvref- vref- 0 dc 0.0
vclock clock 0 dc 0 pulse(0 1.5 0 0 0 4.9n 10n)
vvin vin 0 dc 0 sin(0.75 0.75 8meg)
.tran 0.1n 3.0us
*调用adc子电路
x1 vdd vref+ vref- vin clock b7 b6 b5 b4 b3 b2 b1 b0 adc8bit
*定义一个理想的8bitadc子电路
.subckt adc8bit vdd vref+ vref- vin clock b7 b6 b5 b4 b3 b2 b1 b0
*设置电路共模电压
vcm vcm 0 v='(v(vref+)-v(vref-))/2'
*设置逻辑开关点
r3 vdd vtrip 100meg
r4 vtrip 0 100meg
*调用理想输入的采样保持电路
xsh vdd vtrip vin vout clock samphold
*传递曲线左移1/2lsb
vpip pipin 0 v='v(vout)-v(vref-)+((v(vref+)-v(vref-))/2^9)'
*8-bit的流水线adc
x7 vdd vtrip vcm pipin b7 vout7 adcbit
x6 vdd vtrip vcm vout7 b6 vout6 adcbit
x5 vdd vtrip vcm vout6 b5 vout5 adcbit
x4 vdd vtrip vcm vout5 b4 vout4 adcbit
x3 vdd vtrip vcm vout4 b3 vout3 adcbit
x2 vdd vtrip vcm vout3 b2 vout2 adcbit
x1 vdd vtrip vcm vout2 b1 vout1 adcbit
x0 vdd vtrip vcm vout1 b0 vout0 adcbit
.ends
*理想的采样保持电路模块
.subckt samphold vdd vtrip vin vout clock
ein vinbuf 0 vin vinbuf 100meg
s1 vinbuf vins vtrip clock switmod
cs1 vins 0 1e-10
s2 vins vout1 clock vtrip switmod
cout1 vout1 0 1e-16
eout vout 0 vout1 0 1
.model switmod sw
**error** (c:\users\tao\desktop\8bit ideal adc.sp:51) unknown model type: sw
**error** (c:\users\tao\desktop\8bit ideal adc.sp:51) difficulty in reading input
***** job aborted
1****** HSPICE -- A-2008.03-SP1 32-BIT (May 26 2008) winnt ******
******
.title 8bit-ideal-adc
****** job statistics summary tnom= 25.000 temp= 25.000 *****
****** Circuit Statistics ******
# nodes = 0 # elements = 5
# resistors = 0 # capacitors = 0 # inductors = 0
# mutual_inds = 0 # vccs = 0 # vcvs = 0
# cccs = 0 # ccvs = 0 # volt_srcs = 5
# curr_srcs = 0 # diodes = 0 # bjts = 0
# jfets = 0 # mosfets = 0 # U elements = 0
# T elements = 0 # W elements = 0 # B elements = 0
# S elements = 0 # P elements = 0 # va device = 0
****** Runtime Statistics (seconds) ******
analysis time # points tot. iter conv.iter
op point 0.00 1 0
readin 0.01
errchk 0.00
setup 0.00
output 0.00
total memory used 148 kbytes
total cpu time 0.01 seconds
total elapsed time 1 seconds
job started at 18:59:17 04/15/2015
job ended at 18:59:17 04/15/2015
Init: hspice initialization file: C:\synopsys\Hspice_A-2008.03-SP1\hspice.ini
****** HSPICE -- A-2008.03-SP1 32-BIT (May 26 2008) winnt ******
Copyright (C) 2008 Synopsys, Inc. All Rights Reserved.
Unpublished-rights reserved under US copyright laws.
This program is protected by law and is subject to the
terms and conditions of the license agreement found in:
C:\synopsys\Hspice_A-2008.03-SP1\license.warn
Use of this program is your acceptance to be bound by this
license agreement. HSPICE is the trademark of Synopsys, Inc.
Input File: c:\users\tao\desktop\8bit ideal adc.sp
Init: read install configuration file: C:\synopsys\Hspice_A-2008.03-SP1\meta.cfg
Init: hspice initialization file: C:\synopsys\Hspice_A-2008.03-SP1\hspice.ini
*定义输出处理
.option post accurate probe
.probe v(vdd) v(vref+) v(vref-) v(vin) v(b7) v(b6)
+v(b5) v(b4) v(b3) v(b2) v(b1) v(b0) v(clock)
*定义控制源
vvdd vdd 0 dc 1.5
vvref+ vref+ 0 dc 1.5
vvref- vref- 0 dc 0.0
vclock clock 0 dc 0 pulse(0 1.5 0 0 0 4.9n 10n)
vvin vin 0 dc 0 sin(0.75 0.75 8meg)
.tran 0.1n 3.0us
*调用adc子电路
x1 vdd vref+ vref- vin clock b7 b6 b5 b4 b3 b2 b1 b0 adc8bit
*定义一个理想的8bitadc子电路
.subckt adc8bit vdd vref+ vref- vin clock b7 b6 b5 b4 b3 b2 b1 b0
*设置电路共模电压
vcm vcm 0 v='(v(vref+)-v(vref-))/2'
*设置逻辑开关点
r3 vdd vtrip 100meg
r4 vtrip 0 100meg
*调用理想输入的采样保持电路
xsh vdd vtrip vin vout clock samphold
*传递曲线左移1/2lsb
vpip pipin 0 v='v(vout)-v(vref-)+((v(vref+)-v(vref-))/2^9)'
*8-bit的流水线adc
x7 vdd vtrip vcm pipin b7 vout7 adcbit
x6 vdd vtrip vcm vout7 b6 vout6 adcbit
x5 vdd vtrip vcm vout6 b5 vout5 adcbit
x4 vdd vtrip vcm vout5 b4 vout4 adcbit
x3 vdd vtrip vcm vout4 b3 vout3 adcbit
x2 vdd vtrip vcm vout3 b2 vout2 adcbit
x1 vdd vtrip vcm vout2 b1 vout1 adcbit
x0 vdd vtrip vcm vout1 b0 vout0 adcbit
.ends
*理想的采样保持电路模块
.subckt samphold vdd vtrip vin vout clock
ein vinbuf 0 vin vinbuf 100meg
s1 vinbuf vins vtrip clock switmod
cs1 vins 0 1e-10
s2 vins vout1 clock vtrip switmod
cout1 vout1 0 1e-16
eout vout 0 vout1 0 1
.model switmod sw
**error** (c:\users\tao\desktop\8bit ideal adc.sp:51) unknown model type: sw
**error** (c:\users\tao\desktop\8bit ideal adc.sp:51) difficulty in reading input
***** job aborted
1****** HSPICE -- A-2008.03-SP1 32-BIT (May 26 2008) winnt ******
******
.title 8bit-ideal-adc
****** job statistics summary tnom= 25.000 temp= 25.000 *****
****** Circuit Statistics ******
# nodes = 0 # elements = 5
# resistors = 0 # capacitors = 0 # inductors = 0
# mutual_inds = 0 # vccs = 0 # vcvs = 0
# cccs = 0 # ccvs = 0 # volt_srcs = 5
# curr_srcs = 0 # diodes = 0 # bjts = 0
# jfets = 0 # mosfets = 0 # U elements = 0
# T elements = 0 # W elements = 0 # B elements = 0
# S elements = 0 # P elements = 0 # va device = 0
****** Runtime Statistics (seconds) ******
analysis time # points tot. iter conv.iter
op point 0.00 1 0
readin 0.01
errchk 0.00
setup 0.00
output 0.00
total memory used 148 kbytes
total cpu time 0.01 seconds
total elapsed time 1 seconds
job started at 18:59:17 04/15/2015
job ended at 18:59:17 04/15/2015
Init: hspice initialization file: C:\synopsys\Hspice_A-2008.03-SP1\hspice.ini
求解答
我也想知道，HSPICE中怎么定义可变电阻，与阈值电压大小有关。还有怎么书写开关，以及打开和关闭的脉冲。
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