请教---请大家帮忙下一篇JSSC 2013的CT Delta-Sigma ADC论文

Nandi, T.; Boominathan, K.; Pavan, S.,

"Continuous-Time Delta-Sigma Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC,"

Solid-State Circuits, IEEE Journal of , vol.48, no.8, pp.1795,1805, Aug. 2013. doi: 10.1109/JSSC.2013.2259012

URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6515127&isnumber=6564404

论坛里有这篇

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