首页 > 微波/射频 > RFIC设计学习交流 > 为什么差分电路不能收敛?

为什么差分电路不能收敛?

录入:edatop.com    阅读:
在ADS里面仿真差分PA不能收敛,出现如下错误:Error detected by hpeesofsim during HB analysis `HB1'.
    No convergence.
Error detected by hpeesofsim during HB analysis `HB1'.
    Divergence in the KCL check detected.
    Convergence hints:
    o Double the fundamental oversample.
    o Select the direct solver.
    o Set Matrix Re-use to Robust.
    o Select the Krylov solver.
    o Increase Krylov Restart Length to 150.
    This is the maximum value based on available memory.
    o Try TAHB (transient assisted HB).
    o Select the Robust convergence mode,
    o Increase max. iterations to 1000.
    o Increase the order.
    o Try to sweep a parameter.
    o Decrease MaxStepRatio.

而单端PA在输入功率范围为-25dBm~10dBm都可以收敛!
差分PA在输入功率小于-5dBm可以收敛,超过之后就会报错!

求大神解释!

春节快乐!

申明:网友回复良莠不齐,仅供参考。如需专业解答,请学习本站推出的微波射频专业培训课程

上一篇:请教关于Verilog-A仿真的问题
下一篇:IC614 谁有64位版的patch or crack ?

射频和天线工程师培训课程详情>>

  网站地图