首页 > 微波/射频 > RFIC设计学习交流 > leakage current problem in the charge pump and loop filter

leakage current problem in the charge pump and loop filter

录入:edatop.com    阅读:
there are three kinds of major leakage currents in advanced CMOS processes:  (a)   tunneling leakage, which relates to the gate   
oxide thickness;
(b) subthreshold leakage
(c) junction diode leakage, which relates to the parasitic pn junctions.
the cross-coupled pair enlarges the output swing in delay cell of vco.

Yes, that is why you have to pay attention when designing such a Loop filter in deep-sub micro process. Many design techniques fail and have to modify for it to work under high leakage conditions.

还以为是文章。

walearning
3q

Design of High-performance CMOS Charge pumps in Phase-locked loops

meidongxi

两位高人,一个吹,一个扯,
呵呵。

小手一抖,5元到手

thank you!

thank you very much

very thanks

deeply thank you

xie xie ni

xie xie nii

thank you 1!

xie xie ni

和啥都没说一个样~

变成灌水帖了

申明:网友回复良莠不齐,仅供参考。如需专业解答,请学习本站推出的微波射频专业培训课程

上一篇:RFIC设计与RF设计有什么差异呢?
下一篇:请教Cadence ADE一个问题!

射频和天线工程师培训课程详情>>

  网站地图