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关于pmos和nmos 的问题

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看 数字集成电路设计透视 一书.说 nmos 能提供 strong zeros 而 pmos 能提供strong ones ,哪位能从原理上解释一下?谢谢!

In my opinion, for NMOS,  the requirement for conduction is Vgs>Vth, so whatever the input signal is , the output sigal is weaker than input by Vth . And the same reason applies to PMOS.
Hoping for more comments

pmos can provide strong '1' , can't not provide strong '0' . From cmos transistor level,you can understand it easily.
pmos Vg minimum value ='0' , it's output voltage level minimum value is |Vtp|.
you can read basic in any analog circuit book .
though you maybe a digital engineer, it is benifit that you read some analog book

both floor 2 and floor 3 answered lz's question very nicely.

It can be understand easily by basic attributes of devices.

应该是拉到地和电源的意思

strong '1' =power voltage
strong '0' =power ground voltage
power ground voltage <weak 0 < threshold point voltage
threshold point voltage < weak 1<power voltage

yes!

yes!

原理说起来还是比较简单的和

学习了

飘过。为了信元

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