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GaAs package level reliability

录入:edatop.com    阅读:
一般来说, III-V器件 如果从半导体厂拿来的时候, 可靠性都是经过测量的(WAFER LEVEL RELIABILITY), 但是变成产品, 要封装组装成MODULE, 因此,不知到大家是否知道PACKAGE LEVEL RELIABILITY 经历过哪些测试, 条件如何, 比如GAAS。III-V  和CMOS不一样,
not like TDDB, HCI which is frozen for CMOS technology.
感觉上应该和WLR 一样,
1.  比如 常见得check GaAs normal failure MODE  
a:  gate contact sinking and channel degradation HCI
b:  ohmic contact degradation at source/drain
c:  Trap level effect
+  packaged induced Hydrogen poison   
2. Is there any testkey must be put into the testchip to debug failure rootcause , interconnect,junction, contact  or others.
    Is there any testkey which can alert potential reliability issue
希望大家一起学习交流。

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