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Advances in radio technology may be significant
Following this timetable, we’re about three years from a fully embedded SDR solution, which is not a lot of time for radio development. Traditionally, at least one year is reserved for design, another for manufacturing and testing the first samples, and a third to move the product from engineering samples to mass production achieving acceptable yield levels and performance. This schedule assumes that a series of "test chips" have been completed. These are needed to model solutions for anticipated problems and technical obstacles identified in producing the radios.
More digital radio solutions will be launched next year, but most, if not all, will be single-mode devices (ie., Bluetooth- or Wi-Fi-only). Essentially, the next two years will prove that using digital-radio architectures facilitates the implementation of radios in deep-submicron CMOS technologies (see the figure). Filters that are tunable over a wide range of frequency bands are now feasible. Using techniques in the digital domain can enhance RF front-end performance. For example, pre-distortion algorithms significantly improve PA efficiency in multi-carrier waveform modulation schemes. Configuring the radio’s back-end doesn’t seem to be a significant issue anymore.
We can then anticipate the development (at least in labs) of digital ICs implementing multiple radio back-ends connected to separate dies for the associated RF front-end functionality. This would allow the development of SDR’s software side, i.e. the configurability. It’s not clear if production versions of such devices would be released, but a System-in-Package (SiP) configuration could provide interesting solutions in the next two years.
The radio back-end doesn’t present much difficulty. The 90- and 65-nm CMOS nodes provide both low power and ample speed to deliver a viable solution. On the other hand, the radio front-end isn’t as amenable for either configurability or tunability over a large range of frequency bands. For example, implementing Bluetooth and quad-band GSM on one die currently requires the support of three separate LNAs, each with different inductors to provide the necessary operating range. In addition, two power amplifiers (PAs) would be needed.
This approach may be selected in the next couple of years for interim SDR solutions. But considering the cost of 90-nm and smaller CMOS wafers, the necessity to combine as much functionality at the radio’s RF front-end as possible is apparent. This year, the industry will be looking for some sign of economically viable solutions addressing this issue, at least in the lab. Many promising possibilities are on the horizon, but none has seen the light in a real radio.
While integrating the functionality on one die to support multiple radios isn’t a problem for the back-end of the radio, it’s definitely a challenge for the front-end. Research and design teams always come up with innovative solutions, assuming they know what to design. Engineers will need guidance about the radios’ configurations to design them. Essentially, they need direction as to which services will be supported in parallel (i.e., simultaneously active transceivers) and when. For example, designing an IC to support both Bluetooth and GSM using advanced SDR techniques may not be interesting from an end-product perspective. Bluetooth usage scenarios rely on the fact that both the GSM and Bluetooth devices work simultaneously. Assuming that one LNA could be designed to support both systems, the LNA will have to be reconfigured between GSM and Bluetooth with sufficient speed to give users the same quality of service that’s currently available when two separates ICs provide the functionality.
If the reconfiguration can’t occur fast enough, two LNAs will be required. Increasing the number of blocks required in an IC will negate any benefits gained from the integration. The next year should provide some clarifications as to the simultaneous functionality required in multi-radio applications, enabling designers to integrate the appropriate building blocks into a system on a chip (SoC).
Another trend to watch for next year will be the type of architectures used to implement WiMAX, 802.11n, and 802.16e. These developments will be an indicator of future expectations in the wireless market, and how they’ll be implemented in a SDR configuration.
About the author
Cedric Paillard is the vice-president of TECHinsights at Semiconductor Insights. He holds BS and MS degrees in VLSI System Engineering from the University of Manchester Institute of Science and Technology. He also has a Bachelor of Engineering from the Ecole Superieure de Technolgie Electrique. Paillard can be reached at cedricp@semiconductor.com.
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