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求解用PADS Logic 生成的网络表的问题

录入：edatop.com 点击：

padsnet.err——记事本
pcb Net List Errors Report - DOTLED1.sch - Wed Nov 09 19:45:31 2011
--------------------------------------------------------------------
Design to Library Part Consistency Check
----------------------------------------
No Library consistency checking errors.
Single/Zero Pin Net Warnings
----------------------------
No single or zero pin nets.
Schematic Connectivity Errors
-----------------------------
Dangling Connections without a Net Name
H8
Sheet 1X5010Y11270
Dangling Connections with a Net Name
H10
Sheet 1X4270Y9790
请好心人解释上面是那出现问题了。