POWERLOGIC 同步PADS 出现如何问题，是什么问题

*pads-ECO-V9.1-METRIC*
*REMARK*old file: d:PADS Projectspadsnet.asc
*REMARK*new file: d:PADS Projectsppcbnet.asc
*REMARK*created by ECOGEN (Version 6.4v) on 2010-2-11 18:08:34
PART DIFFERENCES
----------------
Schematic PCB
Ref-des Part-typeecal Ref-des Part-typeecal
NET DIFFERENCES
----------------
Schematic PCB
SWAPPED GATE DIFFERENCES
------------------------
Schematic PCB
SWAPPED PIN DIFFERENCES
------------------------
Schematic PCB
UNMATCHED NET PINS IN Schematic
-------------------------------
UNMATCHED NET PINS IN PCB
-------------------------
ATTRIBUTE DIFFERENCES
---------------------
Attribute Level [ Schematic Parent -> PCB Parent ]
Attribute Name Schematic Value PCB Value
RULES DIFFERENCES (Values in mm)
-----------------
Object Type Object Name [ Schematic -> PCB ] Rule Type
Rule Name Schematic Value PCB Value
NET BATT CLEARANCE
TRACK_TO_TRACK 0.152400
VIA_TO_TRACK 0.152400
VIA_TO_VIA 0.152400
PAD_TO_TRACK 0.152400
PAD_TO_VIA 0.152400
PAD_TO_PAD 0.152400
SMD_TO_TRACK 0.152400
SMD_TO_VIA 0.152400
SMD_TO_PAD 0.152400
SMD_TO_SMD 0.152400
COPPER_TO_TRACK 0.254000
COPPER_TO_VIA 0.254000
COPPER_TO_PAD 0.254000
COPPER_TO_SMD 0.254000
COPPER_TO_COPPER 0.254000
TEXT_TO_TRACK 0.152400
TEXT_TO_VIA 0.152400
TEXT_TO_PAD 0.152400
TEXT_TO_SMD 0.152400
OUTLINE_TO_TRACK 0.254000
OUTLINE_TO_VIA 0.254000

没问题吧

同题