PCB问题大家

布板后检查输出如下，知道的人告诉下原因：ProtelDesignSystemDesignRuleCheckPCBFile:Board1CopyofBOARD1.pcbDate:17-Apr-2009Time:11:04:30ProcessingRule:ClearanceConstraint(Gap=10mil)(Ontheboard),(Ontheboard)ViolationbetweenTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerandTrack(4741mil,6351mil)(4750mil,6360mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerandTrack(4750mil,6360mil)(4750mil,7110mil)TopLayerViolationbetweenTrack(4700mil,6650mil)(4750mil,6600mil)TopLayerandTrack(4750mil,6360mil)(4750mil,7110mil)TopLayerViolationbetweenTrack(4700mil,6875mil)(4750mil,6925mil)TopLayerandTrack(4750mil,6360mil)(4750mil,7110mil)TopLayerViolationbetweenTrack(4700mil,7100mil)(4750mil,7050mil)TopLayerandTrack(4750mil,6360mil)(4750mil,7110mil)TopLayerViolationbetweenTrack(4750mil,6925mil)(4750mil,7050mil)TopLayerandTrack(4750mil,6360mil)(4750mil,7110mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerandTrack(4750mil,6240mil)(4750mil,6360mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4775mil,6225mil)TopLayerandTrack(4750mil,6240mil)(4750mil,6360mil)TopLayerViolationbetweenTrack(4351mil,6275mil)(4900mil,6275mil)TopLayerandTrack(4750mil,6240mil)(4750mil,6360mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerandTrack(4750mil,6240mil)(5110mil,6240mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4775mil,6225mil)TopLayerandTrack(4750mil,6240mil)(5110mil,6240mil)TopLayerViolationbetweenTrack(4775mil,6225mil)(4990mil,6225mil)TopLayerandTrack(4750mil,6240mil)(5110mil,6240mil)TopLayerViolationbetweenVia(4990mil,6225mil)TopLayertoBottomLayerandTrack(4750mil,6240mil)(5110mil,6240mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerandTrack(4680mil,6240mil)(4750mil,6240mil)TopLayerViolationbetweenTrack(4750mil,6250mil)(4775mil,6225mil)TopLayerandTrack(4680mil,6240mil)(4750mil,6240mil)TopLayerViolationbetweenTrack(4351mil,6275mil)(4900mil,6275mil)TopLayerandTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerViolationbetweenTrack(4576mil,6351mil)(4741mil,6351mil)TopLayerandTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerViolationbetweenTrack(4875mil,6375mil)(4975mil,6475mil)BottomLayerandTrack(4755mil,6480mil)(5355mil,6480mil)BottomLayerViolationbetweenTrack(4975mil,6475mil)(5225mil,6475mil)BottomLayerandTrack(4755mil,6480mil)(5355mil,6480mil)BottomLayerViolationbetweenTrack(5225mil,6475mil)(5300mil,6550mil)BottomLayerandTrack(4755mil,6480mil)(5355mil,6480mil)BottomLayerViolationbetweenTrack(3010mil,5955mil)(3010mil,5990mil)BottomLayerandTrack(3010mil,5990mil)(3010mil,6451mil)BottomLayerViolationbetweenTrack(2975mil,6025mil)(3010mil,5990mil)BottomLayerandTrack(3010mil,5990mil)(3010mil,6451mil)BottomLayerViolationbetweenVia(2975mil,6075mil)TopLayertoBottomLayerandTrack(3010mil,5990mil)(3010mil,6451mil)BottomLayerViolationbetweenTrack(3010mil,5955mil)(3010mil,5990mil)BottomLayerandTrack(2971mil,5951mil)(3010mil,5990mil)BottomLayerViolationbetweenTrack(2975mil,6025mil)(3010mil,5990mil)BottomLayerandTrack(2971mil,5951mil)(3010mil,5990mil)BottomLayerViolationbetweenVia(4990mil,6225mil)TopLayertoBottomLayerandTrack(4950mil,6150mil)(4950mil,6275mil)BottomLayerRuleViolations:26ViolationsDetected:26TimeElapsed:00:00:00

只看一个，剩下LZ自己看就进步了
ClearanceConstraint(Gap=10mil)(Ontheboard),(Ontheboard)ViolationbetweenTrack(4750mil,6250mil)(4750mil,6600mil)TopLayerandTrack(4741mil,6351mil)(4750mil,6360mil)TopLayer
10mil的间距约束违反规则的线：toplayer层的
A线：(4750mil,6250mil)(4750mil,6600mil)
B线：(4741mil,6351mil)(4750mil,6360mil)
你可以在PCB的编辑栏的选Violation，具体看下位置。

o
youzhi