基于Resistor－Capacitor（RC）缓冲器设计的电源开关

<[p] >电源开关是每个电源转换器的心脏。它们的操作将直接决定了产品的可靠性和效率。以提高电力转换器的开关电路的性能，缓冲器被放置在电源开关来抑制尖峰电压和潮湿通过电路电感引起的开关打开时的振荡。适当的设计缓冲的可导致更高的可靠性，更高的效率和更低的EMI。在许多不同类型的缓冲器时，电阻器-电容器(RC)缓冲器是最流行的缓冲电路。这篇文章解释了为什么一个缓冲器是需要电源开关。并且提供了一个最佳的缓冲设计中实用的技巧。<[p] >Resistor-Ca[p] acitor(RC) Snubber Design for [p] ower Switches<[p] >The [p] ower switches are the heart of every [p] ower converter. Their o[p] eration will directly determine the reliability and efficiency of the [p] roduct. To enhance the [p] erformance of the switching circuit of [p] ower converters, snubbers are [p] laced across the [p] ower switches to su[p] [p] ress voltage s[p] ikes and dam[p] the ringing caused by circuit inductance when a switch o[p] ens. [p] ro[p] er design of the snubber can result in higher reliability, higher efficiency and lower EMI. Among many different kinds of snubbers, the resistor-ca[p] acitor (RC) snubber is the most [p] o[p] ular snubber circuit. This article ex[p] lains why a snubber is needed for [p] ower switches. Some [p] ractical ti[p] s for an o[p] timum snubber design are [p] rovided as well.<[p] >&nbs[p] ;<[p] >&nbs[p] ;<[p] >Figure 1: Four basic [p] ower switching circuits.<[p] >There are many different to[p] ologies used in [p] ower converters, motor drivers and lam[p] ballasts. Figure 1 shows four basic [p] ower switching circuits. Within all of these four fundamental circuits, and in most [p] ower switching circuits, the same switch-diode-inductor network is shown within the blue lines. The behavior of this network is the same in all these circuits. Therefore, a sim[p] lified circuit as shown in Figure 2 can be used for the switching [p] erformance analysis for the [p] ower switches during a switching transient. Since the current in the inductor almost does not change during a switchifng transient, the inductor is re[p] laced with a current source as shown in the figure. The ideal voltage and current-switching waveform of the circuit is also shown in Figure 2.<[p] >&nbs[p] ;<[p] >&nbs[p] ;<[p] >Figure 2: Sim[p] lified [p] ower switching circuit and its ideal switching waveform. When the MOSFET switch turns off, the voltage across it rises. The current IL, however, will kee[p] flowing through the MOSFET until the switch voltage reaches Vol. The current IL begins to fall once the diode turns on. When the MOSFET switch turns on, the situation is reversed as shown in the figure. This ty[p] e of switching is referred to as “hard switching”. The maximum voltage and maximum current must be su[p] [p] orted simultaneously during the switching transient. Therefore, this “hard switching” ex[p] oses the MOSFET switch to high stress.<[p] >&nbs[p] ;<[p] >&nbs[p] ;<[p] >Figure 3: Voltage overshoot at the MOSFET switch turn-off transient. In [p] ractical circuits, the switching stress is much higher because of the [p] arasitic inductance (L[p] ) and ca[p] acitance (C[p] ) as shown in Figure 4.C[p] includes the out[p] ut ca[p] acitance of the switch and stray ca[p] acitance due to [p] CB layout and mounting. L[p] includes the [p] arasitic inductance of the [p] CB route and MOSFET lead inductance. These [p] arasitic inductances and ca[p] acitances from the [p] ower devices form a filter that resonates right after the turn-off transient, and therefore su[p] erim[p] oses excessive voltage ringing to the devices as shown in Figure 3. To su[p] [p] ress the [p] eak voltage, a ty[p] ical RC snubber is a[p] [p] lied across the switch as shown in Figure 4. The value of the resistor must be close to the im[p] edance of the [p] arasitic resonance which it is intended to dam[p] . The snubber ca[p] acitance must be larger than the resonant circuit ca[p] acitance, but must be small enough in order to kee[p] the [p] ower dissi[p] ation of the resistor to a minimum.<[p] >&nbs[p] ;<[p] >&nbs[p] ;<[p] >Figure 4: Resistor-ca[p] acitor snubber configuration. Where [p] ower dissi[p] ation is not critical, there is a quick design a[p] [p] roach for the RC snubber. Em[p] irically, choose the snubber ca[p] acitor Csnub equal to twice the sum of the switch out[p] ut ca[p] acitance and the estimated mounting ca[p] acitance. The snubber resistor Rsnub is selected so that<[p] >. The [p] ower dissi[p] ation on Rsnub at a given switching frequency (fs) can be estimated as:<[p] >When this sim[p] le and em[p] irical design does not limit the [p] eak voltage sufficiently, then the o[p] timizing [p] rocedure will be a[p] [p] lied. O[p] timized RC snubber: In those cases where [p] ower dissi[p] ation is critical, a more o[p] timum design a[p] [p] roach should be used. First, measure the ringing frequency (Fring) at the MOSFET switch node (SW) when it turns off. Solder a film ty[p] e 100 [p] F low-ESR ca[p] acitor across the MOSFET. Increase the ca[p] acitance until the ringing frequency is half of the original measured value. Now the total out[p] ut ca[p] acitance of the switch (the added ca[p] acitance [p] lus original [p] arasitical ca[p] acitance) is increased by a factor of four as the ringing frequency is inversely [p] ro[p] ortional to the square root of the circuit’s inductance ca[p] acitance [p] roduct. So the [p] arasitic ca[p] acitance C[p] is one-third of the externally added ca[p] acitor value. The [p] arasitic inductance L[p] now can be obtained by using the following equation:<[p] >Once the [p] arasitic inductance L[p] and [p] arasitic ca[p] acitance C[p] are figured out, the snubber resistor Rsnub and ca[p] acitor Csnub can be chosen based on following calculation.<[p] >The snubber resistor can be fine-turned further to reduce the ringing if it is found to be insufficient. The [p] ower dissi[p] ation on Rsnub at a given switching frequency (fs) is<[p] >. Using all of the calculated values, the design for the [p] ower su[p] [p] ly switch snubber is com[p] lete and can be im[p] lemented in the a[p] [p] lication.