TI_PCB Design Guidelines For Reduced EMI

【文件名】:09111-TI_PCB Design Guidelines For Reduced EMI.pdf
1Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1RF Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.2Surface-Mount Devices vs Through-Hole Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3Static Pins vs Active Pins vs Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4Basic Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.4.1Proportionality of Loops and Dipoles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.5Differential vs Common Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2.1Grounds and Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.2Two-Layer vs Four-Layer Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.3Microcomputer Grounds in One- and Two-Layer Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.1.4Signal Return Grounds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.1.5Analog vs Digital vs High Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.6Analog Power-Supply Pins and Analog Reference Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.1.7Power Plane Do’s and Dont’s for Four-Layer Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.2Power Distribution for Two-Layer Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.2.1Single-Point vs Multipoint Distribution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.2Star Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.2.3Gridding to Create Planes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.4Bypassing and Ferrite Beads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2.2.5Keeping Noise Close to the Chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3Board Zoning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4Signal Traces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4.1Capacitive and Inductive Crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4.2Antenna Factor Length Rules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4.3Series Termination, Transmission Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4.4Impedance Matching at Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5Cables and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.1Differential-Mode and Common-Mode Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.2Crosstalk Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.3Number of Returns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.5.4I/O Recommendations for Off-PCB Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.5.5Keeping Noise and Electrostatic Discharge (ESD) Out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.6Other Layout Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.6.1Front-Panel PCB with Keypad and Display in Automotive and Consumer Applications. . . . . . . . . . . . . 15
2.6.2Layout for Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.6.3Autorouters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3Shielding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1How It Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2Grounding the Shield . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3Cables and Bypassing to the Shield . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4Slot Antennas: Cooling Slots and Seams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5Literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
【目　录】:

ABSTRACT
General layout guidelines for printed circuit boards (PCB), which exist in relatively obscure documents, are summarized. Some
guidelines apply specifically to microcontrollers; however, the guidelines are intended to be general, and apply to virtually all
modern CMOS integrated circuits. This document covers most known and published layout techniques as applied in a
low-noise, unshielded environment. Efforts have been made to target two-layer boards, and the maximum acceptable noise
level is assumed to be 30 dB, or greater, more stringent than FCC Part 15. This level seems to be the upper limit of acceptable
noise in European and U.S. automotive markets.
This document does not always explain the why’s of a given technique because it is intended only as a reference document,
not a teaching aid. The reader is cautioned against making the assumption that although on a prior design a given technique
was not applied and the unit had acceptable performance, that the technique is not useful. Over time, as IC devices increase
in speed and density, every method to isolate and reduce noise will be required.
1 Background
1.1 RF Sources
Design guidelines to be discussed concern radio-frequency (RF) noise from the microcomputer. This noise is generated inside
the device and is coupled out in many different possible ways. The noise is present on all outputs, inputs, power supply, and
ground at all times. Potentially, every pin on the microcomputer can be a problem.
The biggest problem is noise from the integrated-circuit (IC) input/output (I/O) pins. Because the area covered by traces
connected to them on the PCB form a large antenna. These pins also connect to both internal and external cables. The noise
from clock switching within the IC appears as ‘‘glitches” on a static output. The glitch is caused by the common impedance
of the output pin and the clock drivers, that is, the shared pins that supply each power and ground. The synchronous nature of
most devices causes all current-switching events to occur at the same time, making a large noise spike containing RF energy.
The second most-important contributor is the power-supply system, which includes the voltage regulation and the bypassing
capacitors at both the regulator and at the microcomputer. These circuits are the source of all the RF energy in the system, as
they feed the clocked circuits inside the IC with the current required for switching.
The third noise source is the oscillator circuit, where the oscillator swings rail to rail. In addition to the fundamental frequency,
harmonics are introduced on the output side because the output buffer is digital, which squares the sine wave. Also, any noise
caused by internal operations, such as the clock buffers, appears on the output. If proper separation is maintained between the
crystal and its tank circuits from other components and traces on the PCB, and the loop areas are kept small, there should be
no problems with this noise source. But it has been shown that if ICs or passive components, such as the main VBatt series
inductor, are placed close to the crystal, harmonics of the crystal can couple and propagate.
The primary focus in this application report is on the first and second previously described noise sources. The way to deal with
the third noise source has been addressed. Also, critical information is disclosed on board zoning (floor planning) and shielding.
1.2 Surface-Mount Devices vs Through-Hole Components
Surface-mount devices (SMD) are better than leaded devices in dealing with RF energy because of the reduced inductances
and closer component placements available. The latter is possible due to the reduced physical dimensions of SMDs. This is
critical to two-layer board design, where maximum effectiveness from noise-control components is needed. Generally, leaded
capacitors all go self-resonant (become more inductive than capacitive) at about 80 MHz. Because noise above 80 MHz needs
to be controlled, serious questions should be asked if a design is to be executed only with through-hole components.
1.3 Static Pins vs Active Pins vs Inputs
As mentioned previously, all lines have noise from the processor, to some degree. The total noise from a pin depends on how
much noise the microcomputer provides it and its function in the system. For example, an output pin has the noise from the
microcomputer’s power rails and the noise capacitively coupled from adjacent pins and the substrate. If the pin’s function is
the system clock, that too...........

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