Effect of Bounding Area Layers on DC Characteristics

Hi,

I'm working on a two layer substrate and I have defined bounding area layers for each layer to choose where the dielectric material is present or not. Recently I have found that the presence of bounding area layers may change DC characteristics of my design, for example when a +1V DC source is connected to a port, I see -1V DC voltage on some other ports and some of them are still +1V. I can not find a remedy for this. Please help me.

Thanks.

> Hi,
>
> I'm working on a two layer substrate and I have defined bounding area layers for each layer to choose where the dielectric material is present or not.

So you are using this in an EM substrate for FEM simulation?

> Recently I have found that the presence of bounding area layers may change DC characteristics of my design, for example when a +1V DC source is connected to a port, I see -1V DC voltage on some other ports and some of them are still +1V. I can not find a remedy for this. Please help me.

This is difficult to answer without knowing anything about your simulation setup. There might be some incorrect DC extrapolation from EM results, or some real effect if your dielectric has DC conductivity.

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