Learning basis

I am new to ADS...

I imported Murata library and I try to simulate a single capacitor. It runs fine in schematic but in layout the results are like the capacitor is not connected. It is probably a basic error but I fail to find it.

I attached my workspace.

Thanks for any help.

HRmmmn on Feb 6, 2016 7:16 PM

附图/附件

Single_CAP_wrk.7zads

The results you are observing are entirely correct for what is happening in this example.

The schematic simulation is showing results from the GRM15 model defined by Murata in the library and these results correlate to the sort of performance that should be expected for a chip capacitor of this style connected in series.

The results of the EM simulation in the layout view shows a much higher insertion loss (dB(S21)) than the schematic simulation which as you say looks as if the capacitor is not present. In fact it is not present but that is correct for what you have defined. The only part of the layout view that is mapped for EM simulation are the two pads drawn on the cond layer. The cond layer is the only layer mapped into the substrate so that is all that is simulated. What is shown on layer packages to represent the body of the chip capacitor is just a simple rectangle and that is not mapped in the substrate. It would be a waste of time trying to include this part of the device though as you have no data to represent the internal structure of the device for EM simulation so it would not be practical to attempt this.

Usually when EM simulations of this sort are attempted these device are purposely removed and only the metal conductors/traces are simulated. The schematic based models for the lumped devices are then embedded back within this data to give the full EM Cosimulation for the circuit. ADS 2015.01 and later has specific steps within the emSetup for automatic partitioning the circuit for "em" or "circuit" simulation to configure such EM Cosimulations.

Search for "EM Circuit Cosimulation" in the help for further explanations.

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