- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
How to set the ground of CPWG?
I wonder whether my ground setting is right or not.
(pic1.png)
I import the gerber file in ads layout. It has two layers, top metal and via(octangle shape).
At the em setup, I map the conductor via in the substrate, setting the hole to the hole(5) layer.
(pic2.png)
Back to the layout, I select all the octangle via and set them to the hole:drawing layer.
Is my setting right??
I find there is a tab Insert ground on the toolbar.
Can I insert a ground pin and don't place via holes??
( pic3.png)
附图/附件
pic1.png
pic3.png
pic2.png
> (pic1.png)
Placing ground symbols in the layout will not have any effect. You better create a physical connection from the side grounds to the bottom ground plane (i.e. draw physical via).
> At the em setup, I map the conductor via in the substrate, setting the hole to the hole(5) layer.
> (pic2.png)
>
> Back to the layout, I select all the octangle via and set them to the hole:drawing layer.
>
> Is my setting right??
Yes, this modelling approach looks right. You can double check in the 3D EM preview to make sure the vias are indeed included in the EM model.
For the vertical line (from north side) there is no via fence over quite some length, so the side grounds can be at rather different potential than the bottom ground. But that is what you have in layout - and Momentum will show if this is causing issues or not.
> I find there is a tab Insert ground on the toolbar.
> Can I insert a ground pin and don't place via holes??
No. For Momentum you need physical (drawn) vias.
> Yes, this modelling approach looks right. You can double check in the 3D EM preview to make sure the vias are indeed included in the EM model.
>
> For the vertical line (from north side) there is no via fence over quite some length, so the side grounds can be at rather different potential than the bottom ground. But that is what you have in layout - and Momentum will show if this is causing issues or not.
>
Hi volker_muehlhaus :
I attach my em preview. Are the vias included in the EM model?
You say there is no via fence over quite some length, and is it the yellow part??
Thank you~
附图/附件
empreview.png
> I attach my em preview. Are the vias included in the EM model?
Yes, we *see* them in the 3D view, so they *are* included.
Layers that are not mapped in the EM substrate will not be visible in the 3D view.
> You say there is no via fence over quite some length, and is it the yellow part??
Yes, that is what I meant. I don't know the frequency in that part of the circuit, but for example the SMD part connected to the top ground there has no direct connection to the bottom ground. Also, for the input to that line, the PCB does not connect top and bottom grounds. This means that griund current flow there can require a long path until it can flow from top to bottom. This can (will) cause trouble, depending on frequency.
申明:网友回复良莠不齐,仅供参考。如需专业帮助,请学习易迪拓培训专家讲授的ADS视频培训课程。
上一篇:CMOS RFIC substrate ground
下一篇:RFIC design: problem with FEM ports definition
国内最全面、最专业的Agilent ADS培训课程,可以帮助您从零开始,全面系统学习ADS设计应用【More..】
- Agilent ADS教学培训课程套装
- 两周学会ADS2011、ADS2013视频教程
- ADS2012、ADS2013射频电路设计详解
- ADS高低阻抗线微带滤波器设计培训教程
- ADS混频器仿真分析实例视频培训课程
- ADS Momentum电磁仿真设计视频课程
- ADS射频电路与通信系统设计高级培训
- ADS Layout和电磁仿真设计培训视频
- ADS Workspace and Simulators Training Course
- ADS Circuit Simulation Training Course
- ADS Layout and EM Simulation Training Course
- Agilent ADS 内部原版培训教材合集