Fourth terminal of this NPN model

From the library unzipped from $HPEEOFS_DIR\oalibs\componentLib\RF_Transistors_vendor_kit.7z, I found this model pb_phl_BFG135_19911011. This is one of the many NPNs in this library that have 4 terminals.

It seems to work just fine with only connecting the usual 3 terminals, but I've never actually seen a model like this. So, what's the 4th terminal for?

附图/附件

4-term-NPN.png

If you are using this device for schematic simulation only then this transistor will work perfect well as 3 terminal device. The intrinsic device, a BJT, is always a 3 terminal device.

Now for this question the 'extra' pin it is a additional emitter pin, connected directly to the other emitter pin. It is there for layout purposes primarily. The device itself has two physical pins for the emitter, one on one end of the package and one on the other end. So there are two separate pins to connect circuitry separately in the layout. These are all connected in parallel for simulation etc. but in the layout represent the real connections to the packaged device.

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