Finding the Bias for an FET using ADS (Advanced Design System)

Hey All! :)

I am working on an HFET. I need to find the Bias points (Vgs and Vds) for this HFET using ADS. I have simulated the IV curves. Further, How should I conclude my Bias points from The IV curves? I have attached a screenshot of the Data display. Please take a look and Help me!

Hello srv_123

I assume you are designing a LNA. The quiescent point determines not only the DC current flowing through the transistor but also other performances like noise figure and linearity. I don't think you can get those kinds of information only through a single IV curves plot.

You can check the datasheet of the transistor you use, it can tell you a lot of things related to the performance of noise figure, linearity or something else in different bias conditions. After reading that, I think you will be able to decide what bias condition of your design is.

Or you can try the design guide in ADS. Open a new schematic file, select DesignGuide -> Amplifier -> S parameter simulation, and then choose one selection in those four choices. After adding your transistor into the template and modify your conditions like frequency, just simulate and you will find a lot of information in the data display page.

Hello torbai,

Thank you. That helps! I am designing a Power Amplifier. Have lost touch with ADS so trying to figure out things. Also, I used the optimized bias points. I simulated the Sparamteres. The S11 looks horrible. So, i want to proceed with the Small signal matching. How do i find the impedance of the transistor? I will need to match that with 50 ohms right?

Hi srv_123

Oh, PA....

I think there is a much more easier way: there are several videos on youtube, like https://www.youtube.com/watch?v=WAingaHfBMs. And below the video display window, there is a link which links to a project file developed by Keysight. I'm pretty sure those videos and files can help you a lot.

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