Problem with Q-factor simulation in ADS

Hi all,

I encountered a problem of calculating Q-factor of a simple parallel RLC circuit in ADS. Attachment is the schematic and its S21 simulated result. In the schematic I set Q of the RLC circuit to be 250, however from the simulated S21 result, the calculated Q was just around 28.

I would sincerely appreciate if someone could clarify my problem.

Thanks alot and best regards,

Q of the loaded circuit will be reduced by connected 50 ohm source and load.

Thanks so much for your help!
By the way, could you please tell me if there is a way to calculate Q of the circuit regardless of effect of the source/load impedance in frequency domain analysis?

Dear FvM,

I just found one way to do such a purpose. I will set source/load impedance to a very high value (can be considered as infinity) to avoid their effect. By using this way, the loaded Q will be close to the unloaded Q.

Anyway, thanks a lot again for your kind help.

Q is by definition to be large with a large Resistor in parallel. Q is small because you have a 50ohm resistor on load as parallel.

Q=Rp/wL.

Don't use s-parameters.Do your s-parameters simulation but plot Zxx (Z11 or Z22) impedance curve because s-parameters are two way and therefore otherside's 50 Ohm port loads the circuit.

Thanks a lot for your suggested method. Do you mean I should calculate the unloaded Q from Z curves because Z is not dependent on the port impedances? If so I think this method is pretty good.

Thank you for your response. You are right, I think my method of using large port impedances was not correct since the resultant Q was still loaded but not unloaded.

That's right.Z-parameters are "Open Circuit Parameters" and while the simulator is computing them for one port, other port is assumed/mathematically forced being as open circuit so the loading effect is disappeared.

Thanks so much for your clear explanations, now I understood that!

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