- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
Via in Ads
cond1 is upper tranaitional metal Layer and cond2 is bottom transitional metal layer
I have defined cond1 as cond, but what should I define cond2
Hi all,
About the via in ADS, I also have a problem:
when I use the VIA2(Cylindrical via hole in microstrip) in ADS, there is a range of usage: 100um<H<635um, if I want to set PCBoard height as 1.6mm. How to ensure the model's accuracy?or is there another method for substitute? Thanks!
In my design I have selected cond2 as cond.
/K
Since the Via goes to your ground in microstip cond2 layer is just cond, same as cond1, cond1 and cond2 have an affect if u using multilayer or overlapping layers.
申明:网友回复良莠不齐,仅供参考。如需专业帮助,请学习易迪拓培训专家讲授的ADS视频培训课程。
上一篇:How can I set In Ads to analysis PA?
下一篇:RF layout in ADS
国内最全面、最专业的Agilent ADS培训课程,可以帮助您从零开始,全面系统学习ADS设计应用【More..】
- Agilent ADS教学培训课程套装
- 两周学会ADS2011、ADS2013视频教程
- ADS2012、ADS2013射频电路设计详解
- ADS高低阻抗线微带滤波器设计培训教程
- ADS混频器仿真分析实例视频培训课程
- ADS Momentum电磁仿真设计视频课程
- ADS射频电路与通信系统设计高级培训
- ADS Layout和电磁仿真设计培训视频
- ADS Workspace and Simulators Training Course
- ADS Circuit Simulation Training Course
- ADS Layout and EM Simulation Training Course
- Agilent ADS 内部原版培训教材合集