- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
Series DRO: How much S11 you guys got in Ads using Osctest?
How to make it higher?
Thanks.
soon
You can add feedback... inductive usually... For a common source FET, i add a MLOC at the source and tune till S11 is max at my desired osc freq...
I dunno the theory behind this but seems like the bigger s11 is the better?
Hope this works for you :)
One thing that can improve the magnitude of S11 (once you get the oscillation) is to use higher Q for resonant components.
Also the DC bias of the active component it will affect the magnitude.
Gecky,
I added the MLOC and still got S11 only 1.1.
How much did you get? 3, 10, or 50? I just would like to have an idea. Seems the output matching also affect the S11.
One paper said too high S11 could lead to unwanted spurious.
Vfone,
I mean the S11 in the linear small signal simulation before I get osillation at HB.
Yes, the DC bias also affect the magnitude. But not too much.
Soon
Hi Soon,
there is limit to how high the S11 can go... If the MLOC dun work for you, add an inductor, say, 10nH ? For my FET, max s11 is 3+...
Theoretically speaking, all you need is S11>1 (negative resistance). The rest depends on your load design... which is, i think, the point vfone is trying to put across... a high Q load will give you gamma_load~1 so no matter how near to 1 your FET S11 is, you might get osc....
Good Luck!
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