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[Help]ADS _ PLL PhaseNoise Response simulation
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I am making a PLL PhaseNoise Response simulation with ADS(Model from DesignGuide).
Can any one kindly help me to explain the expressions in the data display window (Fig 1) ? They are too complex to understand. Beacause some variables have not been defined in anywhere ~~
And I don't know the appropriate parameters to fill in Fig 2....
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1.
2.
PS:
The chip is ADF4111 which PhaseNoise floor is -215dBc/Hz.
Can any one kindly help me to explain the expressions in the data display window (Fig 1) ? They are too complex to understand. Beacause some variables have not been defined in anywhere ~~
And I don't know the appropriate parameters to fill in Fig 2....
----------------------------------------------------------------------------------------------------
1.
2.
PS:
The chip is ADF4111 which PhaseNoise floor is -215dBc/Hz.
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