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hi all,i put drain and gate curent probe at drain and gate terminals and using s par. module.question is ,is that probe reading accurate?,i put voltage and resistors at these terminals,if i remove them,the s apr. simulation be so bad.help pls
regards

Don't quite understand what you are trying to do. If you are trying to derive the S-parameters of the transistor, than you shouldn't put the probes in there, all you have to do is to put the TERMS at each end. On the other hand, if you are trying to make a DC simulation, than you just have to polaize it, and then make the DC simulation. If you want to know the voltage and current you just have to call the "Show DC solutions" - it should be somerwhere in the Menu.

Best regards

hi, i understand u want to say,my problem that i know that dc not change s par. calculaion that not affect by changing current and voltage, problem is if i change small resistance at gate and drain (i biasing network) all simulation of s par. affected by it and it be so bad,if i remove it ,the results so so bad.so what i do,i ignore the resistance and try to simulate again,help pls
regards

If you try to make DC and S-Param simulation you need a SPICE based model and dont forget DC Feed, DC Block before 50 Ohm Terminators.
When you use S-Param Model you can make only S-Param simulation.
(because S-Param Model is measured at fixed Bias Point)

the resistence will effect it .

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