Linearity Simulation Problem in ADS

Hi all,

When I simulate LNA's linearity in ADS, first I use DC-Block at input-port and output-port, its IIP3 is 0.7dB and OIP3 is 22.3dB. But when I change these DC-Block to capacitors, its linearity changed a lot. IIP3 is -3.9 and OIP3 is 17.2dB.
But I think the two capacitors should not affect linearity too much, so who can tell me the reason? Thanks! ( the circuit is connected to bias-network with DC-Feed).

With a two tone test the f1-f2 product (aka beat frequency) is going to be at a low frequency. You capacitor may not be large enough (compared to the huge capacitance of the DC block) therefore the impedance the transistor sees at that low frequency is higher than the 50 ohms it sees with the DC block. The DC feed (very large inductor) also a problem since it presents a very high impedance path to the supply at low frequencies. In reality you want a low impedance path to teh supply at low frequencies or else the transistor will not get enough current. The crux of the matter is that DC blocks and feeds are only good for S-parameter extraction and should not be used for non-linear simulations. Use your intended bias network.

Good Suggestion！Thanks！

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