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Timestep errors when designing PLL in ADS
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hi
i am currentlu doing a pll design in ads. I have done the same design in Microwave office and it worked. but the design in ads is giving some timestep errors. pls help.
i am currentlu doing a pll design in ads. I have done the same design in Microwave office and it worked. but the design in ads is giving some timestep errors. pls help.
if you r using the transient analysis in ads......change the time step to a lower value. it will work. i had the same problem.
thanks....it improves the situation a little. thanks a lot
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