- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
做的原理图有几处报错,怎么解决
录入:edatop.com 点击:
[Warning] 控制板采样备用电路.SchDoc Compiler Net NetC9_1 has no driving source (Pin C9-1,Pin R18-2,Pin U14-48) 9:30:37 2015/8/26 59
[Warning] 控制板采样备用电路.SchDoc Compiler NetC9_1 contains Output Port and Unspecified Port objects (Port 2-ADC-BY1,Port 2-ADC-BY1) 9:30:37 2015/8/26 26
[Warning] 控制板网侧电流采样.SchDoc Compiler 2-ADC-IU1 contains Input Port and Unspecified Port objects (Port 2-ADC-IU2,Port 2-ADC-IU2) 9:30:37 2015/8/26 21
[Warning] 控制板网侧电流采样.SchDoc Compiler 2-ADC-IU1 contains Output Port and Unspecified Port objects (Port 2-ADC-IU2,Port 2-ADC-IU2) 9:30:37 2015/8/26 22
[Warning] 控制板网侧电流采样.SchDoc Compiler 2-ADC-IV1 contains Input Port and Unspecified Port objects (Port 2-ADC-IV2,Port 2-ADC-IV2) 9:30:37 2015/8/26 19
[Warning] 控制板网侧电流采样.SchDoc Compiler 2-ADC-IV1 contains Output Port and Unspecified Port objects (Port 2-ADC-IV2,Port 2-ADC-IV2) 9:30:37 2015/8/26 20
[Warning] 控制板网侧电流采样.SchDoc Compiler 2-ADC-IW1 contains Output Port and Unspecified Port objects (Port 2-ADC-IW2,Port 2-ADC-IW2,Port 2-ADC-IW2) 9:30:37 2015/8/26 18
[Warning] 控制板网侧电流采样.SchDoc Compiler Net 2-ADC-IW1 has no driving source (Pin C25-1,Pin R43-2,Pin R222-2,Pin U14-35) 9:30:37 2015/8/26 56
[Warning] 控制板网侧电流采样2.SchDoc Compiler 1-ADC-IV2 contains Output Port and Unspecified Port objects (Port 1-ADC-IV1,Port 1-ADC-IV1) 9:30:37 2015/8/26 25
[Warning] 控制板网侧电流采样2.SchDoc Compiler 1ADC-IU2 contains Output Port and Unspecified Port objects (Port 1-ADC-IU1,Port 1-ADC-IU1) 9:30:37 2015/8/26 24
[Warning] 控制板网侧电流采样2.SchDoc Compiler 1ADC-IW2 contains Output Port and Unspecified Port objects (Port 1-ADC-IW1,Port 1-ADC-IW1) 9:30:37 2015/8/26 23
[Warning] 控制板网侧电流采样2.SchDoc Compiler Net 1-ADC-IV2 has no driving source (Pin C17-1,Pin R31-2,Pin U23-30) 9:30:37 2015/8/26 58
[Warning] 控制板网侧电流采样2.SchDoc Compiler Net 1ADC-IW2 has no driving source (Pin C14-1,Pin R26-2,Pin U23-31) 9:30:37 2015/8/26 57
[Warning] 控制板网压电压采样.SchDoc Compiler 1-ADC-US contains Input Port and Unspecified Port objects (Port 1-ADC-V1,Port 1-ADC-V1) 9:30:37 2015/8/26 16
[Warning] 控制板网压电压采样.SchDoc Compiler 1-ADC-US contains Output Port and Unspecified Port objects (Port 1-ADC-V1,Port 1-ADC-V1) 9:30:37 2015/8/26 17
[Warning] 控制板网压电压采样.SchDoc Compiler 1-ADC-UT contains Input Port and Unspecified Port objects (Port 1-ADC-W1,Port 1-ADC-W1) 9:30:37 2015/8/26 14
[Warning] 控制板网压电压采样.SchDoc Compiler 1-ADC-UT contains Output Port and Unspecified Port objects (Port 1-ADC-W1,Port 1-ADC-W1) 9:30:37 2015/8/26 15
[Warning] 控制板网压电压采样.SchDoc Compiler 1-ADC-UUR contains Input Port and Unspecified Port objects (Port 1-ADC-U1,Port 1-ADC-U1) 9:30:37 2015/8/26 12
[Warning] 控制板网压电压采样.SchDoc Compiler 1-ADC-UUR contains Output Port and Unspecified Port objects (Port 1-ADC-U1,Port 1-ADC-U1) 9:30:37 2015/8/26 13
[Warning] 控制板网压电压采样.SchDoc Compiler 2-ADC-UUN contains Output Port and Unspecified Port objects (Port 2-ADC-U2,Port 2-ADC-U2) 9:30:37 2015/8/26 11
[Warning] 控制板网压电压采样.SchDoc Compiler 2-ADC-UVN contains Output Port and Unspecified Port objects (Port 2-ADC-V2,Port 2-ADC-V2) 9:30:37 2015/8/26 10
[Warning] 控制板网压电压采样.SchDoc Compiler 2-ADC-UWN contains Output Port and Unspecified Port objects (Port 2-ADC-W2,Port 2-ADC-W2) 9:30:37 2015/8/26 9
[Warning] 控制板网压电压采样.SchDoc Compiler Net 2-ADC-UUN has no driving source (Pin C38-1,Pin R62-2,Pin U14-40) 9:30:37 2015/8/26 55
[Warning] 控制板网压电压采样.SchDoc Compiler Net 2-ADC-UVN has no driving source (Pin C44-1,Pin R72-2,Pin U14-39) 9:30:37 2015/8/26 54
[Warning] 控制板网压电压采样.SchDoc Compiler Net 2-ADC-UWN has no driving source (Pin C50-1,Pin R82-2,Pin U14-38) 9:30:37 2015/8/26 53
[Warning] 控制板网压电压采样.SchDoc Compiler NetR60_2 contains Input Port and Unspecified Port objects (Port U2_P,Port U2_P) 9:30:37 2015/8/26 32
[Warning] 控制板网压电压采样.SchDoc Compiler NetR70_2 contains Input Port and Unspecified Port objects (Port V2_P,Port V2_P) 9:30:37 2015/8/26 33
[Warning] 控制板网压电压采样.SchDoc Compiler NetR80_2 contains Input Port and Unspecified Port objects (Port W2_P,Port W2_P) 9:30:37 2015/8/26 34
[Warning] 控制板直流电压采样.SchDoc Compiler NetC71_1 contains Output Port and Unspecified Port objects (Port 1-AD-UPV1,Port 1-AD-UPV1) 9:30:37 2015/8/26 7
[Warning] 控制板直流电压采样.SchDoc Compiler NetC78_1 contains Output Port and Unspecified Port objects (Port 1-AD-UPV2,Port 1-AD-UPV2) 9:30:37 2015/8/26 8
[Warning] 控制板直流电压采样.SchDoc Compiler NetR117_2 contains Input Port and Unspecified Port objects (Port UPV1P_DIP,Port UPV1P_DIP) 9:30:37 2015/8/26 27
[Warning] 控制板直流电压采样.SchDoc Compiler NetR127_2 contains Input Port and Unspecified Port objects (Port UM_DIP,Port UM_DIP) 9:30:37 2015/8/26 31
[Warning] 控制板直流电压采样.SchDoc Compiler NetR128_2 contains Input Port and Unspecified Port objects (Port UPV2P_DIP,Port UPV2P_DIP) 9:30:37 2015/8/26 28
[Warning] 控制板直流电压采样.SchDoc Compiler NetR140_2 contains Input Port and Unspecified Port objects (Port DSP2_N2DIP,Port DSP2_N2DIP) 9:30:37 2015/8/26 49
[Warning] 控制板直流电压采样.SchDoc Compiler NetR142_2 contains Input Port and Unspecified Port objects (Port DSP2_P2DIP,Port DSP2_P2DIP) 9:30:37 2015/8/26 50
[Warning] 控制板直流电压电流采样备用.SchDoc Compiler Net NetC101_1 has no driving source (Pin C101-1,Pin R170-2,Pin U23-33) 9:30:37 2015/8/26 52
[Warning] 控制板直流电压电流采样备用.SchDoc Compiler Net NetC95_1 has no driving source (Pin C95-1,Pin R157-2,Pin U23-32) 9:30:37 2015/8/26 51
[Warning] 控制板直流电压电流采样备用.SchDoc Compiler NetC101_1 contains Output Port and Unspecified Port objects (Port 1-AD-UPV4,Port 1-AD-UPV4) 9:30:37 2015/8/26 6
[Warning] 控制板直流电压电流采样备用.SchDoc Compiler NetC95_1 contains Output Port and Unspecified Port objects (Port 1-AD-UPV3,Port 1-AD-UPV3) 9:30:37 2015/8/26 5
[Warning] 控制板直流电压电流采样备用.SchDoc Compiler NetR154_2 contains Input Port and Unspecified Port objects (Port UPV3P_DIP,Port UPV3P_DIP) 9:30:37 2015/8/26 29
[Warning] 控制板直流电压电流采样备用.SchDoc Compiler NetR168_2 contains Input Port and Unspecified Port objects (Port UPV4P_DIP,Port UPV4P_DIP) 9:30:37 2015/8/26 30
[Warning] 逆变DSP电路图3.SchDoc Compiler Nets Wire DSP2-EMU0 has multiple names (Net Label DSP2-EMU0,Net Label DSP2-TCK,Net Label J-DSP2-TCKRET) 9:30:37 2015/8/26 4
[Warning] 斩波DSP电路图.SchDoc Compiler Nets Wire 1-VDD has multiple names (Net Label 1-VDD,Power Object 1P1.8) 9:30:37 2015/8/26 2
[Warning] 斩波DSP电路图.SchDoc Compiler Nets Wire 1-VDDIO has multiple names (Net Label 1-VDDIO,Power Object 1P3.3) 9:30:37 2015/8/26 3
[Warning] 斩波DSP外围电路.SchDoc Compiler Harness Connector Type cannot be blank 9:30:36 2015/8/26 1
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire DSP1-TCK 9:30:37 2015/8/26 60
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire DSP1-TDI 9:30:37 2015/8/26 61
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire DSP1-TDO 9:30:37 2015/8/26 62
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire DSP1-TMS 9:30:37 2015/8/26 63
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire DSP1-TRST 9:30:37 2015/8/26 64
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire UPV1DC 9:30:37 2015/8/26 65
[Error] 对外接口.SchDoc Compiler Duplicate Net Names Wire UPV2DC 9:30:37 2015/8/26 66
[Error] 控制板采样备用电路.SchDoc Compiler Net NetR16_1 contains multiple Input Ports (Port DSP2_N1DIP,Port DSP2_N1DIP) 9:30:37 2015/8/26 47
[Error] 控制板采样备用电路.SchDoc Compiler Net NetR19_1 contains multiple Input Ports (Port DSP2_P1DIP,Port DSP2_P1DIP) 9:30:37 2015/8/26 48
[Error] 控制板网侧电流采样.SchDoc Compiler Net NetR42_1 contains multiple Input Ports (Port IW2-R,Port IW2-R) 9:30:37 2015/8/26 40
[Error] 控制板网侧电流采样.SchDoc Compiler Net NetR44_1 contains multiple Input Ports (Port IW2,Port IW2) 9:30:37 2015/8/26 39
[Error] 控制板网侧电流采样.SchDoc Compiler Net NetR47_1 contains multiple Input Ports (Port IV2-R,Port IV2-R) 9:30:37 2015/8/26 38
[Error] 控制板网侧电流采样.SchDoc Compiler Net NetR49_1 contains multiple Input Ports (Port IV2,Port IV2) 9:30:37 2015/8/26 37
[Error] 控制板网侧电流采样.SchDoc Compiler Net NetR54_1 contains multiple Input Ports (Port IU2-R,Port IU2-R) 9:30:37 2015/8/26 36
[Error] 控制板网侧电流采样.SchDoc Compiler Net NetR56_1 contains multiple Input Ports (Port IU2,Port IU2) 9:30:37 2015/8/26 35
[Error] 控制板网侧电流采样2.SchDoc Compiler Net NetR25_1 contains multiple Input Ports (Port IW1-R,Port IW1-R) 9:30:37 2015/8/26 46
[Error] 控制板网侧电流采样2.SchDoc Compiler Net NetR27_1 contains multiple Input Ports (Port IW1,Port IW1) 9:30:37 2015/8/26 45
[Error] 控制板网侧电流采样2.SchDoc Compiler Net NetR30_1 contains multiple Input Ports (Port IV1-R,Port IV1-R) 9:30:37 2015/8/26 44
[Error] 控制板网侧电流采样2.SchDoc Compiler Net NetR32_1 contains multiple Input Ports (Port IV1,Port IV1) 9:30:37 2015/8/26 43
[Error] 控制板网侧电流采样2.SchDoc Compiler Net NetR37_1 contains multiple Input Ports (Port IU1-R,Port IU1-R) 9:30:37 2015/8/26 42
[Error] 控制板网侧电流采样2.SchDoc Compiler Net NetR39_1 contains multiple Input Ports (Port IU1,Port IU1) 9:30:37 2015/8/26 41
原理图符号库中的引脚的电气属性含有input和output,multiple inputs是因为符号库中有多个mode
原理图符号库中的引脚的电气属性含有
Cadence Allegro 培训套装,视频教学,直观易学
上一篇:置顶、精华贴部分汇总_20130922
下一篇:请问 Altium Designer 6.9 导成DWG时 出现异常