- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
求教DRC检查问题
原用9.2版本画的原理图,DRC时没问题,可现用10.1打开,检查却有问题了。显示:
Checking Pins and Pin Connections
--------------------------------------------------Checking Schematic: 4-DECODER_PROC--------------------------------------------------Checking Electrical Rules
Checking for Unconnected Nets
Checking Off-Page Connections
Checking for Duplicate References
Check Bus width mismatch
--------------------------------------------------Checking Schematic: MAINBOARD--------------------------------------------------Checking Electrical Rules ERROR: [DRC0004] Possible pin type conflict SCH4,+3V3OP Output Connected to Power MAINBOARD, root (13.30, 4.00)
Checking for Unconnected Nets
Checking Off-Page Connections
Checking for Duplicate References
Check Bus width mismatch
--------------------------------------------------Checking Schematic: 1-PREAMP--------------------------------------------------Checking Electrical Rules ERROR: [DRC0004] Possible pin type conflict MVREF2 Output Port Connected to Power 1-PREAMP, PREAMP (7.10, 8.10) WARNING: [DRC0004] Possible pin type conflict RFVCC Passive Port Connected to Passive Port 1-PREAMP, PREAMP (18.50, 5.30)
Checking for Unconnected Nets
Checking Off-Page Connections
Checking for Duplicate References
Check Bus width mismatch
--------------------------------------------------Checking Schematic: 3-DECODER--------------------------------------------------Checking Electrical Rules
Checking for Unconnected Nets
Checking Off-Page Connections
Checking for Duplicate References
Check Bus width mismatch
--------------------------------------------------Checking Schematic: 2-SERVO--------------------------------------------------Checking Electrical Rules
Checking for Unconnected Nets
Checking Off-Page Connections
Checking for Duplicate References
Check Bus width mismatch
这是为什么啊?朋友知道吗?
我是用“place hierarchical block"画的分页符
我没出现过这样的错误,我一直用的都是place Off-Page connector.帮你顶一下。
Cadence Allegro 培训套装,视频教学,直观易学
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