请教一个出网表问题

请教一个出网表问题！

我在用ORCAD出Allegro的网表的时候遇到这样一个问题！网表出了不能和Allegro连接，是怎么回事呢！请问哪位大侠给个指点啊！view log 报的错在下面！我看不懂为什么啊！

C:\Cadence\PSD_14.2\tools\Capture\allegro.cfg

Spawning... "C:\Cadence\PSD_14.2\tools\Capture\pstswp.exe" -pst -d "d:\working\lvds_4u_reuse-v03_1\net\lvds_4u_v03.dsn" -n "D:\WORKING\LVDS_4U_REUSE-V03_1\NET" -c "C:\Cadence\PSD_14.2\tools\Capture\allegro.cfg" -v 3#1 Warning [ALG0047] "No_connect" property on Pin "U14.24" ignored for U14: SCHEMATIC1, 5-CPU (3.00, 1.10). Connecting pin to net "ADDRESS7".#2 Warning [ALG0047] "No_connect" property on Pin "U14.27" ignored for U14: SCHEMATIC1, 5-CPU (3.00, 1.10). Connecting pin to net "ADDRESS4".#3 Warning [ALG0047] "No_connect" property on Pin "U14.26" ignored for U14: SCHEMATIC1, 5-CPU (3.00, 1.10). Connecting pin to net "ADDRESS5".#4 Warning [ALG0047] "No_connect" property on Pin "U14.25" ignored for U14: SCHEMATIC1, 5-CPU (3.00, 1.10). Connecting pin to net "ADDRESS6".#5 Warning [ALG0047] "No_connect" property on Pin "CONC2.C2" ignored for CONC2: SCHEMATIC1, 4-interface2 (3.10, 0.40). Connecting pin to net "LED_DR7".#6 Warning [ALG0047] "No_connect" property on Pin "CONC2.B2" ignored for CONC2: SCHEMATIC1, 4-interface2 (1.60, 0.40). Connecting pin to net "LED_DR6".#7 Warning [ALG0047] "No_connect" property on Pin "CONC2.A1" ignored for CONC2: SCHEMATIC1, 4-interface2 (0.20, 0.40). Connecting pin to net "LED_DR0".##115 Warning [ALG0051] Pin "VCC" is renamed to "VCC#8" after substituting illegal characters in Package EPCS1/4 , U6: SCHEMATIC1, 1-FPGA (4.80, 13.00).#116 Warning [ALG0051] Pin "VCC" is renamed to "VCC#7" after substituting illegal characters in Package EPCS1/4 , U6: SCHEMATIC1, 1-FPGA (4.80, 13.00).

Exiting... "C:\Cadence\PSD_14.2\tools\Capture\pstswp.exe" -pst -d "d:\working\lvds_4u_reuse-v03_1\net\lvds_4u_v03.dsn" -n "D:\WORKING\LVDS_4U_REUSE-V03_1\NET" -c "C:\Cadence\PSD_14.2\tools\Capture\allegro.cfg" -v 3

*** Done ***

********************************************************************************** Updating Allegro Board *********************************************************************************Netlist Directory:D:\WORKING\LVDS_4U_REUSE-V03_1\NETInput Allegro Board:D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan.brdOutput Allegro Board:D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan1.brd

Spawning... netrev.exe -5 -y 1 -x -i "D:\WORKING\LVDS_4U_REUSE-V03_1\NET" "D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan.brd" "D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan1.brd"Reading File : D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstchip.dat(00:00:00.01)Reading File : D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstxprt.dat(00:00:00.04)Reading File : D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstxnet.dat(00:00:00.06)Starting to process component instances

netrev run on Apr 26 13:19:34 2004 DESIGN NAME : 'LVDS_4U_V03' PACKAGING ON Feb 7 2002 16:12:12

3 errors detected No oversight detected No warning detected

cpu time 0:00:46elapsed time 0:00:00

Exiting... netrev.exe -5 -y 1 -x -i "D:\WORKING\LVDS_4U_REUSE-V03_1\NET" "D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan.brd" "D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan1.brd"Cadence Design Systems, Inc. netrev Mon Apr 26 13:19:34 2004(C) Copyright 2002 Cadence Design Systems, Inc.

------ Directives ------

RIPUP_ETCH TRUE;RIPUP_SYMBOLS ALWAYS;MISSING SYMBOL AS ERROR FALSE;SCHEMATIC_DIRECTORY 'D:\WORKING\LVDS_4U_REUSE-V03_1\NET';BOARD_DIRECTORY 'D:\working\LVDS_4U_REUSE-V03_1\shiyan';OLD_BOARD_NAME 'D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan.brd';NEW_BOARD_NAME 'D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan1.brd';UPDATE_DEPTABLE FALSE;

CmdLine: netrev.exe -5 -y 1 -x -i D:\WORKING\LVDS_4U_REUSE-V03_1\NET D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan.brd D:\working\LVDS_4U_REUSE-V03_1\shiyan\shiyan1.brd

------ Preparing to read pst files ------

Starting to read D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstchip.dat Finished reading D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstchip.dat (00:00:00.01)Starting to read D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstxprt.dat Finished reading D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstxprt.dat (00:00:00.04)Starting to read D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstxnet.dat Finished reading D:/WORKING/LVDS_4U_REUSE-V03_1/NET/pstxnet.dat (00:00:00.06)

------ Oversights/Warnings/Errors ------

#1 ERROR(302) Device library error detected.

Problems with device 'ICS502_SOP8\200_ICS502M'. JEDEC_TYPE property 'SOP8\200' is illegal: 'Package name is not legal.'.

Device 'ICS502_SOP8\200_ICS502M' has library errors. Unable to transfer to Allegro.

#2 ERROR(302) Device library error detected.

Problems with device 'CAP_0_CAP\5MM\R8_1000UF'. JEDEC_TYPE property 'CAP\5MM\R8' is illegal: 'Package name is not legal.'.

Device 'CAP_0_CAP\5MM\R8_1000UF' has library errors. Unable to transfer to Allegro.

------ Summary Statistics ------

#3 ERROR(102) Run stopped because errors were detected

netrev run on Apr 26 13:19:34 2004 DESIGN NAME : 'LVDS_4U_V03' PACKAGING ON Feb 7 2002 16:12:12

COMPILE 'logic' CHECK_PIN_NAMES OFF CROSS_REFERENCE OFF FEEDBACK OFF INCREMENTAL OFF INTERFACE_TYPE PHYSICAL MAX_ERRORS 500 MERGE_MINIMUM 5 NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|' NET_NAME_LENGTH 24 OVERSIGHTS ON REPLACE_CHECK OFF SINGLE_NODE_NETS ON SPLIT_MINIMUM 0 SUPPRESS 20 WARNINGS ON

3 errors detected No oversight detected No warning detected

cpu time 0:00:46elapsed time 0:00:00

*** Done ***

不明白

你定义的元件封装在allegro中没有

device 中不能有\等非法字符

封装起的名字有问题，修改一下名字试试