在PROTEL里画的PCB图转到ALLEGRO里面是出现的问题？

在PROTEL里画的PCB图转到ALLEGRO里面是出现如下问题Layout To PCBEditor   Version 15.7.0
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WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'BUTTON148'
WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'TS5169'
WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'BUTTON148_S1'
WARNING (Layout To PCBEditor), Duplicate pin names were renamed in footprint 'TS5169_U22'
WARNING (Layout To PCBEditor), Netname 'SPI2_MOSI' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'SPI1_MISO' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'I2C1_SCL' was discarded because it is by any component pad
WARNING (Layout To PCBEditor), Netname 'SPI1_NSS' was discarded because it is not used bynot used by any component pad
WARNING (Layout To PCBEditor), Netname 'I2C1_SDA' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'I2C1_SMBAI' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'I2C2_SCL' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'I2C2_SDA' was discarded because it is not used  any component pad
WARNING (Layout To PCBEditor), Netname 'SPI2_NSS' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'USART1_RX' was discarded because it is not used by any component pad
WARNING (Layout To PCBEditor), Netname 'USART1_TX' was discarded because it is not used by any component pad
ERROR (Layout To PCBEditor), Padstack '56' is malformed on layer 1
Netlist Warnings and Errors recorded in 'E:\TEST\netin.log':
Translate time 1 seconds

请高手解答一下是怎么回事呢?

估计是你的库和封装 没有导好..

Protel DXP在输出Capture DSN文件的时候，没有输出封装信息，在Capture中我们会看到所以元件的PCB Footprint属性都是空的。这就需要我们手工为元件添加封装信息，这也是整个转化过程中最耗时的工作。在添加封装信息时要注意保持与Protel PCB设计中的封装一致性，以及Cadence在封装命名上的限制。例如一个电阻，在Protel中的封装为AXIAL0.4，在后面介绍的封装库的转化中，将被修改为AXIAL04，这是由于Cadence不允许封装名中出现“.”；再比如DB9接插件的封装在Protel中为DB9RA/F，将会被改为DB9RAF。因此我们在Capture中给元件添加封装信息时，要考虑到这些命名的改变。