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Hotfix_SPB16.30.008_README_CCR(更新说明)
录入:edatop.com 点击:
DATE: 05-14-2010 HOTFIX VERSION: 008
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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697699 CONCEPT_HDL HDLDIRECT SCM Verilog output contains the line 揹efparam <instance number>.SIZE
734169 ALLEGRO_EDITOR PLACEMENT Wildcard asterisk character giving "illegal char(s) in refdes entry." error in quickplace.
738970 SIG_INTEGRITY GEOMETRY_EXTRACT power bus issue with SSN simulation when device is on bottom
744762 CONCEPT_HDL OTHER Connection dot sizes do not match on printout vs. screen
750371 MODEL_INTEGRIT GUI Model name in physical view cann't match the model in right workspace
757024 CAPTURE STABILITY Capture crashes while exporting to EDIF
759094 CONSTRAINT_MGR INTERACTIV One member of a diff pair will show Analysis Failed when analyzing the design.
760178 ALLEGRO_EDITOR EXTRACT Crash Allegro when executing extracta command for big size design(size of .brd
761391 SIG_EXPLORER OTHER Incorrect rise time
762402 ALLEGRO_EDITOR MANUFACT When photoplot(RS274X) of MM unit was loaded, shape was broken.
762783 SIG_EXPLORER INTERACTIV sigxp - coupled tline on stackup layer should show solved impedance
763150 ALLEGRO_EDITOR OTHER Request - IPC356 output truncate the padstack size to fit into the columns 59-62 and 64-67
763556 SIP_LAYOUT ASSY_RULE_CHECK Assembly Rules Checker is displaying an array of confusing DRC's on a Soldermask shape.
764399 SPECCTRA ROUTE Manually routed trace in Allegro are ripped OFF after routing in SPECCTRA using Route > Route Editor.
764475 SIG_EXPLORER INTERACTIV topologies from earlier versions cannot be opened in 16.2 on a machine
765287 ALLEGRO_EDITOR PAD_EDITOR attempting to open padstack fails with - database has a non-recoverable corruption.
766041 ALLEGRO_EDITOR OTHER Auto B/B via generator incorrectly defines some BB vias
766153 ALLEGRO_EDITOR SKILL Allegro crashes when trying to extract padstack information
766611 ALLEGRO_EDITOR EDIT_ETCH slide creates DRCs in ARK area
767041 CONCEPT_HDL CORE The tap command failed because the specified tap body CTAP is invalid
767146 FLOWS PROJMGR Project manager open last open .cpm in 15.7 version not in 16.3
767526 FLOWS PROJMGR Project Manager customization does not work
767671 APD DATABASE Crash creating cline with axlDBCreatePath() on this database.
767951 ALLEGRO_EDITOR DATABASE color net param file omits nets with bus brackets in the name
768168 CONCEPT_HDL CORE Fontsize on instances changes when doing backannotation
768207 CAPTURE STABILITY Capture crash while editing properties
768734 CAPTURE PROPERTY_EDITOR Properties of title block are not getting editted through spread sheet.
768832 APD DRC_CONSTRAINTS Following Performance Advisor instructions results in much longer DRC check time.
768990 F2B PACKAGERXL RFSIP architect 16.3 85Y Schematic to SiP fails due to softinclude in cds.lib file this problem does not occur on 16.2
769097 SIG_INTEGRITY GEOMETRY_EXTRACT Sip Digital SI-Bus Simulation function will shut down auomatically when it is running
769235 SPIF OTHER need to be able to remove mbs_spif* properties added by mbs2brd
769326 CONSTRAINT_MGR DATABASE Length by Layer crashing
769336 ALLEGRO_EDITOR TESTPREP testprep density - returns Unable to add the PROBE_DENSITY subclasses.
769458 ALLEGRO_EDITOR OTHER SMD Jumper has a problem about the connection point when using the Add Jumper
769845 ALLEGRO_EDITOR EDIT_ETCH Diffpair routing out affected by line to line spacing rule.
769934 SIP_LAYOUT WIREBOND Duplicate Finger Name.
770006 ALLEGRO_EDITOR OTHER Ratsnest_schedule[Power_AND_Ground] can not show figure without move symbol.
770125 ALLEGRO_EDITOR DATABASE PCB SI GXL Via Labels grayed out on formand labels not visible on the canvas
770212 ALLEGRO_EDITOR DRC_CONSTR Incorrect Etch Turn under SMD pad DRC error on this board
770230 ALLEGRO_EDITOR ARTWORK Artwork fails to suppress unconnected pads on pins with the net_short property.
770233 ALLEGRO_EDITOR MANUFACT Fillets are not behaving as intended.
770442 SCM PACKAGER Error during Export Physical - The subdesign block instances ares not updated with reuse properties
770556 CONSTRAINT_MGR ANALYSIS PCB Editor's Constraint Manager not updating custom constraint cell.
770861 ALLEGRO_EDITOR PADS_IN PADS translation fails with no error message
770872 SIG_INTEGRITY OTHER Opening Orcad PCB Editor for this board takes Performance License as well
771117 ALLEGRO_EDITOR DRC_CONSTR Allegro PCB Editor crashes on Update DRC-16.3/hotfix006
771181 ALLEGRO_EDITOR PLACEMENT Component deleted completely from board file after we Mirror and rotate them while moving them.
771256 ALLEGRO_EDITOR DRC_CONSTR Update DRC consumes system memory and crashes allegro after approx 30 minutes
771423 ALLEGRO_EDITOR SHAPE Shapes - Update to Smooth - Low on available memory please exit the program.
771456 ALLEGRO_EDITOR EDIT_ETCH Allegro 16.3 crashes when using arrow keys
771719 PSPICE MODELEDITOR Can not generate a DEHDL symbol from Model Editor, because no Capture license.
771765 ALLEGRO_EDITOR PADS_IN PADS translation fails to translate symbol
771766 ALLEGRO_EDITOR DRC_CONSTR Moving certain components takes a long time on this board database.
771815 SIP_LAYOUT IO_PLANNER SiP OA co-design flow does not allow a save to the .sip file after modifications in IOP
773072 SIP_LAYOUT ASSY_RULE_CHECK wire to wire same profile
773126 CONSTRAINT_MGR UI_FORMS Constraint Manager "Value Filtering" for Topology Schedule is missing TEMPLATE and "UserDefined"
773179 ALLEGRO_EDITOR PAD_EDITOR pad_designer crashed when attemting to delete internal name layer.
773229 ALLEGRO_EDITOR OTHER Netrev never end importing netlist generated from Capture CIS
773329 ALLEGRO_EDITOR MANUFACT Allegro closes when performing a Linear dimensioning and then selecting the undo icon.
773483 ALLEGRO_EDITOR MODULES place module problem
774036 ALLEGRO_EDITOR INTERACTIV Rats not shown after move->mirror command
774170 ALLEGRO_EDITOR DATABASE DBDOCTOR fixes Error but it reappears and Artwork fails
774602 SCM OTHER ASA crash while working with hierarchy
774643 CONCEPT_HDL CORE DEHDL crash on edit of attributes
775201 ALLEGRO_EDITOR SKILL Color palette can only be changed one time using skill commands
775815 SIP_LAYOUT WIREBOND Unused wire profile once purged using wire profile editor are still available in CM and Color dialog
775826 SIP_LAYOUT WIREBOND Cannot change the Wire Profiles on the wirebonds in this design
775842 SIP_LAYOUT WIZARDS Die text in wizard is changing DIE location when origin set in DIE text file is other than 0, 0
DATE: 04-23-2010 HOTFIX VERSION: 007
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
721859 ALLEGRO_EDITOR OTHER update shape to smooth creates tmp file on remote file server working dir why?
740201 SPECCTRA_MENT_ IMPORT Wrong stackup order after translating from mbs2sp
744797 SIP_LAYOUT OTHER Cannot Copy a connector (IO) symbol in APD and SiP tools
747831 CIS CONFIGURATION There is a delay of 5 to 10 mins in opening SQL database in V16.2 and V16.3. It is fine in V16.0.
747848 CIS CONFIGURATION Unable to configure CIS with Oracle database due to Capture crash.
751372 CAPTURE OTHER Copy / Paste Issue in capture 16.3
757434 ALLEGRO_EDITOR MODULES Allegro hangs the board file after creating Placement Replicate circuit.
759906 CIS PART_MANAGER Property copy from one to several parts doesn't work
760154 PSPICE NETLISTER Model parameter (Tj) is not affecting Smoke Analysis result
761177 CIS OTHER Error Message - Memory exhausted
762602 CIS EXPLORE_DATABASE CIS doesn't open datasheet for parts if it is not stored at default Capture location.
763677 APD EDIT_ETCH The "Via to Via Line Fattening" tool is inconsistent in which clines are changed.
763715 CAPTURE NETLIST_OTHER A long pin name gets truncated upto 31 characters when the wirelist is created.
763878 CONSTRAINT_MGR DATABASE Why Pinpairs disappear after closing Constraint Manager?
764020 CAPTURE NETLISTS Usernetl.dll has changed between 16.2 and 16.3
764101 APD EDIT_ETCH Perpendicular routing through a Region does not work when the region segment is drawn at an angle.
764200 ALLEGRO_EDITOR DRC_CONSTR Via at smd fit drc on a via that is placed fully inside the padstack having custom pad
764903 PSPICE ENVIRONMENT 'Run in Resume Mode' does not work in SPB 16.3
765206 F2B PACKAGERXL Unable to feedback subsequent pin swaps from Allegro
765319 APD DRC_CONSTRAINTS Identical Constraints in Performance Advisor question
765541 SIP_LAYOUT SHAPE Set via oversize value to 3 in dynamic shape instance parameters will make overlap shape.
766147 APD EDIT_ETCH Resize/Respace Diff Pairs does not work on 45 and off angle
766337 SIG_INTEGRITY GEOMETRY_EXTRACT Geometry of Via model Extracted from board file is not identical to Original Via geometry design
766443 ALLEGRO_EDITOR PADS_IN unable to translate PADS ascii to brd in 16.3
766581 CIS CONFIGURATION In 16.3 capture.exe remains memory-resident after exit
767161 ALLEGRO_EDITOR SHAPE The behavior of Add Fillet command is different by Hotfix version.
767217 SIP_LAYOUT IMPORT_DATA The Die-Text In wizard and it is crashing on the "Finish" step.
767598 SIP_LAYOUT WIREBOND Can't wirebond SIP designs as it just hangs.
767832 ALLEGRO_EDITOR DRC_CONSTR Reducing Design Accuracy updates Physical Diffpair constraints wrongly
768822 ALLEGRO_EDITOR SKILL axlSetParam return value is divided by 10 to the power of the design accuracy.
769150 CIS PART_MANAGER Update All part Status on a group changes 揇o Not Stuff?status to 揝tuffed?in V61.3_ISR_5.
DATE: 04-09-2010 HOTFIX VERSION: 006
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
745241 CONSTRAINT_MGR TECHFILE Importing a tcf file automatically enables On-Line DRC.
752587 ALLEGRO_EDITOR PLACEMENT Uppercase File name(XX.mdd) for Placement replicate update on Linux.
753626 CONCEPT_HDL CORE newgenasym error while saving the hierarchical block symbol
753894 CAPTURE OTHER Case sensitive version control S/W
754487 RF_PCB OTHER Various asymmetrical clearance problems uncovered - calculation issues?
758272 CONSTRAINT_MGR UI_FORMS Entering values on the Min/Max Propagation Delays worksheet hangs the application.
758911 PSPICE PROBE Pspice crashes while exporting probe data using our sample project
759871 CAPTURE PROPERTY_EDITOR Save option in Right Mouse Click on property editor of nets doesn't saves all the changes.
759890 SPECCTRA ROUTE Specctra autorouter ignoring prerouted nets
760067 ALLEGRO_EDITOR SHAPE Dynamic Shape not getting filled on board with odd angle placement and routing
760284 CONCEPT_HDL CORE Update Sheet Variables turns of the grid
760480 MODEL_INTEGRIT OTHER Message open clipboard failed when trying to open the rename/reorder dialog in Model Integrity
760667 ALLEGRO_EDITOR PADS_IN The pads_in.exe translate incorrect drill shape from PADS 2005 ascii database.
760741 ALLEGRO_EDITOR MENTOR mbs2brd does not work in 16.3 but works in 16.2
760810 CONSTRAINT_MGR INTERACTIV Deleting Region Deletes NCCs
761114 PSPICE PROBE Refresh issue in Display > Cursor window
761180 ALLEGRO_EDITOR DRC_CONSTR Via_at_smd not working for custom shaped padstacks.
761305 SPIF OTHER Allegro crash when seleting any of the Route - PCB Router - submenu items.
761376 ALLEGRO_EDITOR PAD_EDITOR Wizard_Template_Path is not considered for symbol template look-up ?
761416 ALLEGRO_EDITOR DATABASE Allegro crash on chaning the subclass for group of clines
761492 ALLEGRO_EDITOR SKILL about axlTransformObject function
761518 F2B PACKAGERXL about mismatch library path between cds.lib and actual
761737 ALLEGRO_EDITOR OTHER Running Dbdoctor after executing Skill is giving symbol fit error for the .dra file
762155 ALLEGRO_EDITOR SYMBOL Updating a symbol changes the netname of the cline resulting in drcs.
762181 ALLEGRO_EDITOR OTHER Allegro netrev crashes for long device name in PST* files
762316 ALLEGRO_EDITOR MANUFACT Allegro disappears on Adding dimensions for the symbol file
762792 ALLEGRO_EDITOR PADS_IN PADS_IN fails for SPB 16.3
763108 ALLEGRO_EDITOR SHAPE Z-copy shape create an error like VOID boundary may not cross itself
763134 SIG_INTEGRITY SIMULATION Bit 7 of a simulation is out of sync with rest of bus. It should be the same for all bus values.
763149 CIS GEN_BOM CIS BOM in V16.3 is not correct if database has Quantity field and its value is 0.
763296 ALLEGRO_EDITOR REFRESH The error was happened while doing the SUM
763303 ALLEGRO_EDITOR OTHER SMD Jumper has a problem while using the Add Jumper
763315 ALLEGRO_EDITOR PADS_IN pads_in got error message WARNING ERROR(SPMHDB-205)
763354 ALLEGRO_EDITOR PADS_IN Auto suppress redundant shape while using pads_in translator
763428 ALLEGRO_EDITOR PADS_IN enhance pads_in.exe translate spacing and physical rule into Allegro.
763446 ALLEGRO_EDITOR REPORTS missing fillet is reporting pad without drill
763448 ALLEGRO_EDITOR DRC_CONSTR Performance advisor shows Cset as unused nets when it is assigned to Diff pairs or xnets.
763586 ALLEGRO_EDITOR DATABASE Allegro rounds off the value after decimal in CM
764077 CONCEPT_HDL CHECKPLUS The output predicate in the Graphical environment is not always returning the pin object for an output pin.
DATE: 03-26-2010 HOTFIX VERSION: 005
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
599819 SIP_LAYOUT 3D_VIEWER display soldermask by default in the 3d viewer
735992 CONCEPT_HDL CORE Create Test Schematic does not use the correct package type
743787 SIG_EXPLORER OTHER 16.3 SigXP crash if sigxp.run created by previous version exist.
746320 CAPTURE NETLIST_ALLEGRO Remove Semi-colon from invalid pin-name check during netlisting
746444 ALLEGRO_EDITOR OTHER show element fails to display info on a via if it is in a module.
746726 SIG_INTEGRITY SIGWAVE Save As and Open Dialogs open in last saved directory
750080 CAPTURE NETLIST_ALLEGRO Improve error message ERROR(SPCODD-390)
750606 SIP_LAYOUT ASSY_RULE_CHECK Wire to BF same profile check
751492 CAPTURE FPGA Option to swap the pin-numbers rather than their locations in the Schematic after back-annotation
753834 CIS LINK_DATABASE_PA unable to link multiple database part
753990 F2B PACKAGERXL Delay in opening the subdesign tab in the Export Physical setup in SPB 16.3
754328 LAYOUT TRANSLATORS L2A gives error Subclass name TOP not valid Allegro subcls with s029 hotfix
754434 CONSTRAINT_MGR OTHER allegro crashes when deleting matched group
755111 ALLEGRO_EDITOR INTERACTIV "ALT_SYMBOLS_HARD TRUE" property does not work when I mirrored symbol using move command in 16.3.
756131 PSPICE SIMULATOR Capture crashes while re-running simulation
756148 PSPICE PROBE Zoom Area in Probe Window does not work for digital signal in SPB163
756169 SIG_EXPLORER OTHER Signal Explorer crashing due to sigsimcntl.dat
756176 PSPICE PROBE Trace color is wrongly interpreted in PSpice probe window.
756224 SIG_INTEGRITY SIMULATION Simulation aborts reporting that VIA models have changed
756281 ALLEGRO_EDITOR OTHER Why *.sav file cannot be recovered from PCB Editor utilities?
756673 SIP_LAYOUT ASSY_RULE_CHECK Running ADRC Metal to metal checks causes false X-D DRCs, cannot clear them and trying crashes the tool
756918 ALLEGRO_EDITOR OTHER Allegro angular dimensions working incorrect in 16.3
756932 ALLEGRO_EDITOR CREATE_SYM Create symbol fails with error duplicate pin number
756976 ALLEGRO_EDITOR SKILL axlChangeWidth always return nil in Allegro version 16.3
757000 PSPICE NETLISTER Incorrect Hierarchical Format Netlist created
757406 APD OTHER Implement Segment over void features in APD L
757624 SIG_EXPLORER OTHER Sigxp runtime error when simulation is run and exit without saving the topology
757820 ALLEGRO_EDITOR SHAPE Shape does not void to hole if there is no pad
758009 ALLEGRO_EDITOR OTHER Export > Library (MECH_SYM) adds a new subclass NCROUTE_PATH, data moved from one subclass to another.
758022 CAPTURE DRC Capture crash while running DRC with 揜un Physical Rules?checkbox.
758190 ALLEGRO_EDITOR PAD_EDITOR PCB Editor crashing on pin move in this design
758374 F2B DESIGNVARI Problem with Mechanical part in Variant Editor
758471 SIG_INTEGRITY OTHER Differential impedance does not change on changing the etch effect values.
758490 CIS CRYSTAL_REPORTS Different crystal report output in 16.3 than from 16.2
758498 CAPTURE NETLISTS PCB Editor netlister hangs
758584 APD SHAPE Shape not voiding all elements
758886 ALLEGRO_EDITOR REPORTS Total number of nets is wrong into Testprep Report
759146 ALLEGRO_EDITOR SKILL The title is not displayed in the form by the version.
759339 ALLEGRO_EDITOR ARTWORK artwork output fails by SPB16.x.
759591 ALLEGRO_EDITOR SKILL axlSetParam fails and does not round the value as indicated by the warning message
759816 CONSTRAINT_MGR OTHER Allegro Hangs when double click on a Bus in CM
759947 APD OTHER Need an a way to convert Lines into Clines
760353 ALLEGRO_EDITOR MANUFACT Allegro crashes and creates a .sav file on running the silkscreen command from Manufacture > Silkscreen
760432 ALLEGRO_EDITOR PARTITION Unable to remove fixed property after partition import
760638 ALLEGRO_EDITOR PADS_IN pads_in translator can not handle " PINPAIRGROUP ".
760734 ALLEGRO_EDITOR SHAPE Different therma contacts on rotated partsl
761436 CAPTURE NETLIST_ALLEGRO SPCODD-53 Error when creating netlist with PACK_SHORT
DATE: 03-12-2010 HOTFIX VERSION: 004
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
689495 ALLEGRO_EDITOR DATABASE corrupt database
725944 SIG_INTEGRITY GEOMETRY_EXTRACT xtalk make allegro freeze and never give hands
732604 SIP_LAYOUT SHAPE Shape Issue - added shape will not clear around other elements.
740106 PSPICE NETLISTER The "Enable PSpice AA Support for Legacy" option does not give the Desired Monte Carlo results
744259 SCM UI Signal order reversed when a Vectored Signal name is renamed in reverse
745554 SIG_INTEGRITY GEOMETRY_EXTRACT Time to get Xtalk simulation result in 16.2 is lower than acceptable by comparing the time in 15.7
745595 RF_PCB FE_IFF_IMPORT import iff RF_PCB give an empty block
747133 CAPTURE STABILITY ERROR [DSM0006] Unable to save
747679 CAPTURE STABILITY Trying to Save the Design in 16.2 format gives DSM0006 Error and crashes Capture
750460 CIS FOOTPRINT_VIEW 3D footprint viewer doesn't shows the footprints
750777 SIG_INTEGRITY OTHER Trace impedance showing wrong
751424 ALLEGRO_EDITOR DRC_CONSTR Unexpacted DRC for Shape to Route Keepout
751897 SIP_LAYOUT SPECCTRA_IF Radial Router crashing SiP tool
752029 SCM OTHER Cross probing not working between SCM and Allegro Editor in Linux Environment
752450 APD PADSTACK_EDITOR APD crashes when selecting a User Definable Mask Layers.
752581 PSPICE PROBE Pspice probe window crash
752709 ALLEGRO_EDITOR PLOTTING Sheet content doesnot plots title block
752908 ALLEGRO_EDITOR INTERFACES Output from Export > DXF shows one instance of a via on the wrong layer
753226 ALLEGRO_EDITOR OTHER File > Change Editor doesn't shows the default Product Options
753622 ALLEGRO_EDITOR GRAPHICS Enahnce capture image command to default the save as location to working dir
753773 APD WIREBOND Requesting the option to set the diameter of the default WB_TACKPOINT power ring pad.
753778 APD IMPORT_DATA Import NA2 displays the design momentarily and then crashes
753866 SIG_INTEGRITY OTHER about Select by Polygon after move command
753958 CAPTURE OTHER Capture V16.3 is extremely slow while edting schematics of design placed on network drive via VPN.
754050 ALLEGRO_EDITOR UI_FORMS Why show element window disappears when scriptmode is set invisible
754143 SIP_LAYOUT OTHER SiP Package Design Integrity - running Extra Cline segments generates report without Layer number
754327 ALLEGRO_EDITOR OTHER Rename Sub Class is not working as desired.
754364 ALLEGRO_EDITOR PLACEMENT Crash when applying placement replication
754462 ALLEGRO_EDITOR SHAPE Allegro circular dynamic shape fails to fill
754819 ALLEGRO_EDITOR OTHER Create details shows wrong graphics for filled curves
755176 ALLEGRO_EDITOR PADS_IN Pads translation succeeds in v16.2 but fails in v16.3 on this ASCII file
755256 ALLEGRO_EDITOR OTHER Attached script is crashing the designs in v16.3
755610 CONCEPT_HDL CREFER Cref hyper links does not work for signals where number "0" used to define the zone for page border
755787 ALLEGRO_EDITOR EDIT_ETCH crash using resize_respace_dp command
755881 ALLEGRO_EDITOR DATABASE Swap component crashes application
756092 CAPTURE PROPERTY_EDITOR property editor flickers and loops on value edits
DATE: 02-23-2010 HOTFIX VERSION: 003
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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263504 CONCEPT_HDL CHECKPLUS Checkplus fails to run if crefrpt exists in the design
726836 ALLEGRO_EDITOR SKILL axlGeo2Str() and axlGeoEqual() return different results
730820 SIP_LAYOUT PADSTACK_EDITOR Changing the Via diameter will cause the SiP tool to crash
735193 CAPTURE FONTS Pin_names and Pin_numbers get convertred into darkened blocks in 慫oom to all?view in V16.2.
737307 SIG_INTEGRITY GEOMETRY_EXTRACT differential pair extraction to sigxp fails to extract coupled sparam via models
740936 ALLEGRO_EDITOR SYMBOL Confusing error message during Create Symbol
744191 ALLEGRO_EDITOR EDIT_ETCH Arc routing enhancement
744497 ALLEGRO_EDITOR INTERACTIV PCB Editor Crashes with Data Customization Feature
746572 ALLEGRO_EDITOR DATABASE Reoccuring error in attribute pointer to attribute invalid on dra.
746978 SIG_INTEGRITY SIGWAVE 2 licenses were used for SigXP and SigWave.
747219 SIP_LAYOUT SHAPE Dynamic Filleting not working with odd angles
747593 ALLEGRO_EDITOR PADS_IN Some RULE_SETS cause the PADS translation to fail.
747746 ALLEGRO_EDITOR OTHER Request for more detail in downrev.log file
748033 GRE IFP_INTERACTIVE Enhancement in GRE where Show Element on Bundleshould show the total number of nets that are part of the bundle
748333 ALLEGRO_EDITOR OTHER place by schematic page number not showing pages correctly
748375 ALLEGRO_EDITOR MANUFACT gloss - line smoothing causes crash
748818 ALLEGRO_EDITOR DRC_CONSTR Undesired DRCs shown in allegro 16.3 while moving component and the same are removed by update DRC
748865 CONSTRAINT_MGR OTHER Allegro 16.3 slow to move component with CM open
749009 APD WIREBOND a part of function of the finger alinement doesn't work
749162 SIG_EXPLORER INTERACTIV Unable to proceed after RMB > Preference > Cancel
749307 ALLEGRO_EDITOR MENTOR mbs2brd fails with error VIF_Allegro_Write
749435 CIS DESIGN_VARIANT Cannot create variant part in 16.3
749854 APD PADSTACK_EDITOR The value of user-defined mask layer is not retained in the design.
749891 ALLEGRO_EDITOR PARTITION Unable to delete existing partitions
749949 SIG_EXPLORER EXTRACTTOP A Topology extraction fails using APD and SiP series with the latest hotfix(SPB16.30.001).
750008 CAPTURE NETLIST_ALLEGRO Netlist different in SPB 16.3 and after installing SPB 16.3 hotfix 1
750591 ALLEGRO_EDITOR DATABASE Analyze diff pair object fails to display uncopled lenght values.
750888 SPECCTRA ROUTE specctra is crashing while routing
751204 F2B DESIGNVARI Design difference crashes while reading funcview
751398 ALLEGRO_EDITOR OTHER Allegro Crash when Edit is selected in Setup > Outline > Room outline
751578 ALLEGRO_EDITOR PADS_IN pads_in hangs while conversion
DATE: 02-09-2010 HOTFIX VERSION: 002
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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527012 SIG_INTEGRITY IRDROP Severe Memory leak in IRDrop
623678 PCB_LIBRARIAN CORE PDV freezes when changing grid
672592 ALLEGRO_EDITOR SHAPE Shape does not void correctly untill a clearance oversize value is added
688062 PCB_LIBRARIAN CORE PDV Strange characters appear when copying text into Bus Arrows ( Text symbols)
710170 SIG_INTEGRITY IRDROP Run IR Drop even if all components on the net are not placed.
710174 SIG_INTEGRITY IRDROP Audit function for IR Drop.
726833 PSPICE DEHDL Modify the methodology for migrating 15.7 and 16.2 users of ConceptPSpice
730717 SCM UI Unable to delete a zero connection signal in SLP which has a pull-up
731017 ALLEGRO_EDITOR DRC_CONSTR DRC's show out of date when artwork is run
732145 CONCEPT_HDL OTHER Incorrectly generated VHDL netlist
740123 ALLEGRO_EDITOR GRAPHICS Capture Image command fillin missing from jrl and script files
740278 ALLEGRO_EDITOR OTHER Jumper fucntion for Single Side PCB Design
740656 ALLEGRO_EDITOR GRAPHICS Can we place custdatatips.cdt file on a site level for SPB16.3
741222 CONCEPT_HDL CORE Replace command (in Windows mode) causes crash
742389 ALLEGRO_EDITOR EDIT_ETCH Change or add message when using Countour route
743275 APD DATABASE With DRC enabled, this design seg faults in axldbid.c (solaris only). DRC update takes orders of magnitude longer on sun
743623 F2B PACKAGERXL Pxl error when using pack_ignore on reuse blocks
744348 F2B BOM PART_NAME column getting word wrapped inspite of sufficient space in the HTML BOM report.
745062 CONSTRAINT_MGR OTHER import techfile does not add new layers in cross section
745148 ALLEGRO_EDITOR GRAPHICS Allegro ptf driven HEIGHT value not pushed into 3D Viewer
745301 ALLEGRO_EDITOR DATABASE Allegro 16.3 crsh on moving component
745518 ALLEGRO_EDITOR DRC_CONSTR DRCs not shown when "Enable Antipads as Route keepout is checked in"
745745 SIP_LAYOUT WIZARDS Die Text In changing the pin names on duplicates
745785 CONSTRAINT_MGR UI_FORMS Unnecessary window opens when the cell in PCSet By layer worksheet was clicked.
746002 CONCEPT_HDL CREFER Could not find pc.db in the root design
746010 CONSTRAINT_MGR SCHEM_FTB Updating the brd file using the "Import Changes Only" option overwrites the modified constraints in
746080 CONSTRAINT_MGR OTHER Click Constraint Manager filter icons crash software
746137 APD IMPORT_DATA Import > NA2 not transalating certain layers and padstack sizes
746370 ALLEGRO_EDITOR GRAPHICS Setting infinite_cursor_bug_nt variable flips mouse movement on flip design
746519 CONCEPT_HDL CHECKPLUS CheckPlus the if statement is not seeing the True condition or the output predicate is not returning the True condition.
746546 PCB_LIBRARIAN VERIFICATION con2con choosing incorrect PART_NAME in PTF File during verification
746865 CONCEPT_HDL CORE Tool generated pspice net names in core concept design cause short with copy all.
747636 SIP_RF OTHER RFSIP Layout RF Module Export chips & connectivity is not writing die attach method to chips file
DATE: 01-31-2010 HOTFIX VERSION: 001
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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491042 CONCEPT_HDL SECTION Prevent PackagerXL from changing visibility on SEC attribute
496910 CAPTURE NETLIST_ALLEGRO Inconsistent netlist creation
558783 PSPICE NETLISTER Why do Models with "awb*" prefix need wirte permissions to "*.ind" files?
643241 CAPTURE SCHEMATIC_EDITOR OrCAD crashed while replacing cache
654292 ALLEGRO_EDITOR DATABASE Propagation Delay constraint behaves differently between 16.01 and 16.2
662829 CONCEPT_HDL GLOBALCHANGE Global Update should honor property visibility settings in ppt_optionset
672718 SIP_LAYOUT EXPORT_DATA "Export>Symbol Spreadsheet" should export a .cvf not a .txt
676233 CAPTURE NETLIST_ALLEGRO Cross probing stops working if design name has dots
678739 CONCEPT_HDL CONSTRAINT_MGR Manually added targets in matchgroups lost when reopen CM
690618 F2B BOM Write protected template.bom fails to write callouts
700246 CIS LINK_DATABASE_PA Need option to update symbol always when linking part in CIS
705393 CONCEPT_HDL CORE ConceptHDL crashes while switching to another hierarchy level under File > Plot Preview.
708634 ALLEGRO_EDITOR SHAPE Shapes getting incorrectly displayed in 16.2
708950 CONCEPT_HDL CORE Tool crashes while trying to change the text on the schematic using a text editor.
709823 ALLEGRO_EDITOR OTHER Arcs not converted properly when upgrading symbols
713964 F2B PACKAGERXL Net property Probe_Number is getting changed during the packaging run
718119 F2B BOM Exclude the callout file name from the template.bom file
718496 SIG_INTEGRITY SIGWAVE Frequency at smith chart.
721422 CONCEPT_HDL CHECKPLUS Checkplus fails if "\\" character is used in the parameter list
721788 SCM OTHER SCM unresponsive while closing out a Block without Saving
721801 CONCEPT_HDL CORE Save As crashes DE HDL if an existing page is selected in the design
722653 F2B PACKAGERXL Packaging does not complete
725285 CONCEPT_HDL CORE nconcepthdl does not work same as concepthdl for same script.
725719 CONCEPT_HDL CORE wire pettern of Publish PDF
727062 CONCEPT_HDL CREFER Custom properties not visible for TOC symbol in schref_1 view
727194 CAPTURE CORRUPT_DESIGN Random Capture crash
727704 SCM PACKAGER ASA to PCB getting out of sync
728066 CAPTURE NETLIST_ALLEGRO Allegro PCB Edtior net cannot be generated if PACK_SHORT is used
729214 CONCEPT_HDL CORE SHOW_PNN_SIGNAME directive used with Windows Mode gives crash
730295 SIG_INTEGRITY OTHER Filled rectangle shapes not extracted properly
731183 CIS QUERY_DATABASE CIS Query fails with ODBC Error for query (Price contains 29)
732073 SIP_LAYOUT DXF_IF DXF_OUT generate an incorrect shape
732138 CONCEPT_HDL CORE Cannot change SI model assignments
732216 ADW DBEDITOR dbeditor crashes doing copy-as-new into lib folder that has partially completed chips.prt file
732249 SIG_INTEGRITY SIMULATION Probe sim with custom stimulus cause segmentation fault. Linux only.
732847 ALLEGRO_EDITOR DRC_CONSTR Manual Void uses Shape to Pin constraint to void Holes
733261 FLOWS PROJMGR Project manager does not work with the Restricted User in client server environment
733773 CONCEPT_HDL OTHER Syntax issues in DEHDL
734260 APD COLOR Why subclasses still remain visible even after global visibility is turned off.
734419 CONCEPT_HDL CORE Concept crashes in windows mode when netname is deleted on schematics generated by ASA
734555 CONSTRAINT_MGR SCHEM_FTB Import Logic does not overwrite the Constraints
735290 CONCEPT_HDL OTHER Concept's PDF Publisher has issues.
735892 CONCEPT_HDL CORE "Component Modify" changes visiblilty of Key properties
735977 ALLEGRO_EDITOR MENTOR Mentor to Allegro translation fails without any error message
736071 CONCEPT_HDL CORE Property visibility is not retained on the schematic instance when we modify the component on sch.
736165 SIP_LAYOUT SCHEMATIC_FTB about error message of "schematic to layout"
736167 CONCEPT_HDL CORE HDL crashes when I select BGA symbol in Component Browser
736911 ALLEGRO_EDITOR SHAPE No DRC displayed when Place Bounds are edge to edge
738035 ALLEGRO_EDITOR OTHER Measure function has different result between 15.7 and 16.2 version.
738129 CONSTRAINT_MGR UI_FORMS Need Diffpair Constraints option in Analysis Modes Electrical Options with Performance license
738276 ALLEGRO_EDITOR PLACEMENT No feedback in console window when placing unfound components in Allgero 16.3
738366 ALLEGRO_EDITOR GRAPHICS 3d viewer not showing some connectors with mutliple place bounds correctly
738454 SIG_INTEGRITY FIELD_SOLVERS EMS2D extracts incorrect CPW to Trace spacing
738578 ALLEGRO_EDITOR OTHER scriptmode +w doesnot work on Linux
738869 ALLEGRO_EDITOR OTHER Error msg when cds.lib contains missing SOFTINCLUDE
739116 EMI SIMULATION At EMI simulation on SigXP an extra Sigwave form is launched.
739225 ALLEGRO_EDITOR GRAPHICS Ability to lock the 'Hide Pallette' option
739599 ALLEGRO_EDITOR DRC_CONSTR drc_errchk indic
739628 ALLEGRO_EDITOR SYMBOL Opening a symbol file is crashing allegro.
739653 ALLEGRO_EDITOR SHAPE Shape created in 15.X .dra changes geometry when uprev'd to 16.X
739661 ALLEGRO_EDITOR OTHER Export netlist creates incorrect via_list syntax.
739872 ALLEGRO_EDITOR SKILL Crash while performing axlExtractToFile in 16.3
739934 SIG_INTEGRITY OTHER specctraquest crash on changing signal model
739937 MODEL_INTEGRIT PARSE zero valued estimated parasitics in ibis models
739942 ALLEGRO_EDITOR SHAPE zcopy xhatch shape creates oversize copy
740133 ALLEGRO_EDITOR DRC_CONSTR Same net DRC Update from Analysis Modes runs forever.
740281 ALLEGRO_EDITOR OTHER Jumper components where were placed in PCB disappeared
740309 SIP_LAYOUT DIE_EDITOR Moving a die pad in DIE EDITOR on G69A_U1 causes the die pads to rotate 90 degrees from the design.
740399 ALLEGRO_EDITOR COLOR Cannot automatically load custom color palette in 16.2
741210 ALLEGRO_EDITOR DATABASE Edit >Move; spin creates 'connect record not found' message
741307 ALLEGRO_EDITOR PADS_IN Shapes on some layers is not getting translated from PADS into Allegro
741313 ALLEGRO_EDITOR DRC_CONSTR Add connect slow in 16.3
741778 ALLEGRO_EDITOR COLOR Color pallete in 16.3 is not expanding when maximize dialog
741910 ALLEGRO_EDITOR PADS_IN unable to translate PADS ascii to brd
741939 ALLEGRO_EDITOR PADS_IN PADS to Allegro Translation fails or hangs.
741980 ALLEGRO_EDITOR PARTITION Import of parition does not import etch or vias.
742676 ALLEGRO_EDITOR SKILL Tpoint cannot be moved by using skill.
743161 ALLEGRO_EDITOR SCHEM_FTB Netrev crashing when importing netlist into board file.
743235 ALLEGRO_EDITOR PLACEMENT Allegro crashes when unmatching comp in placement replicate.
743243 CONSTRAINT_MGR TECHFILE Closing CM destroys tcf values when they are set to locked using fObjectNOTReadOnly
743301 SIP_LAYOUT DIE_EDITOR Edit die command creates two extra die pads
743316 CONSTRAINT_MGR DATABASE With Allegro 16.3 Constraint manager takes to long to update
743553 CONSTRAINT_MGR OTHER Net disappears if we cancel the line width edits in CM
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
697699 CONCEPT_HDL HDLDIRECT SCM Verilog output contains the line 揹efparam <instance number>.SIZE
734169 ALLEGRO_EDITOR PLACEMENT Wildcard asterisk character giving "illegal char(s) in refdes entry." error in quickplace.
738970 SIG_INTEGRITY GEOMETRY_EXTRACT power bus issue with SSN simulation when device is on bottom
744762 CONCEPT_HDL OTHER Connection dot sizes do not match on printout vs. screen
750371 MODEL_INTEGRIT GUI Model name in physical view cann't match the model in right workspace
757024 CAPTURE STABILITY Capture crashes while exporting to EDIF
759094 CONSTRAINT_MGR INTERACTIV One member of a diff pair will show Analysis Failed when analyzing the design.
760178 ALLEGRO_EDITOR EXTRACT Crash Allegro when executing extracta command for big size design(size of .brd
761391 SIG_EXPLORER OTHER Incorrect rise time
762402 ALLEGRO_EDITOR MANUFACT When photoplot(RS274X) of MM unit was loaded, shape was broken.
762783 SIG_EXPLORER INTERACTIV sigxp - coupled tline on stackup layer should show solved impedance
763150 ALLEGRO_EDITOR OTHER Request - IPC356 output truncate the padstack size to fit into the columns 59-62 and 64-67
763556 SIP_LAYOUT ASSY_RULE_CHECK Assembly Rules Checker is displaying an array of confusing DRC's on a Soldermask shape.
764399 SPECCTRA ROUTE Manually routed trace in Allegro are ripped OFF after routing in SPECCTRA using Route > Route Editor.
764475 SIG_EXPLORER INTERACTIV topologies from earlier versions cannot be opened in 16.2 on a machine
765287 ALLEGRO_EDITOR PAD_EDITOR attempting to open padstack fails with - database has a non-recoverable corruption.
766041 ALLEGRO_EDITOR OTHER Auto B/B via generator incorrectly defines some BB vias
766153 ALLEGRO_EDITOR SKILL Allegro crashes when trying to extract padstack information
766611 ALLEGRO_EDITOR EDIT_ETCH slide creates DRCs in ARK area
767041 CONCEPT_HDL CORE The tap command failed because the specified tap body CTAP is invalid
767146 FLOWS PROJMGR Project manager open last open .cpm in 15.7 version not in 16.3
767526 FLOWS PROJMGR Project Manager customization does not work
767671 APD DATABASE Crash creating cline with axlDBCreatePath() on this database.
767951 ALLEGRO_EDITOR DATABASE color net param file omits nets with bus brackets in the name
768168 CONCEPT_HDL CORE Fontsize on instances changes when doing backannotation
768207 CAPTURE STABILITY Capture crash while editing properties
768734 CAPTURE PROPERTY_EDITOR Properties of title block are not getting editted through spread sheet.
768832 APD DRC_CONSTRAINTS Following Performance Advisor instructions results in much longer DRC check time.
768990 F2B PACKAGERXL RFSIP architect 16.3 85Y Schematic to SiP fails due to softinclude in cds.lib file this problem does not occur on 16.2
769097 SIG_INTEGRITY GEOMETRY_EXTRACT Sip Digital SI-Bus Simulation function will shut down auomatically when it is running
769235 SPIF OTHER need to be able to remove mbs_spif* properties added by mbs2brd
769326 CONSTRAINT_MGR DATABASE Length by Layer crashing
769336 ALLEGRO_EDITOR TESTPREP testprep density - returns Unable to add the PROBE_DENSITY subclasses.
769458 ALLEGRO_EDITOR OTHER SMD Jumper has a problem about the connection point when using the Add Jumper
769845 ALLEGRO_EDITOR EDIT_ETCH Diffpair routing out affected by line to line spacing rule.
769934 SIP_LAYOUT WIREBOND Duplicate Finger Name.
770006 ALLEGRO_EDITOR OTHER Ratsnest_schedule[Power_AND_Ground] can not show figure without move symbol.
770125 ALLEGRO_EDITOR DATABASE PCB SI GXL Via Labels grayed out on formand labels not visible on the canvas
770212 ALLEGRO_EDITOR DRC_CONSTR Incorrect Etch Turn under SMD pad DRC error on this board
770230 ALLEGRO_EDITOR ARTWORK Artwork fails to suppress unconnected pads on pins with the net_short property.
770233 ALLEGRO_EDITOR MANUFACT Fillets are not behaving as intended.
770442 SCM PACKAGER Error during Export Physical - The subdesign block instances ares not updated with reuse properties
770556 CONSTRAINT_MGR ANALYSIS PCB Editor's Constraint Manager not updating custom constraint cell.
770861 ALLEGRO_EDITOR PADS_IN PADS translation fails with no error message
770872 SIG_INTEGRITY OTHER Opening Orcad PCB Editor for this board takes Performance License as well
771117 ALLEGRO_EDITOR DRC_CONSTR Allegro PCB Editor crashes on Update DRC-16.3/hotfix006
771181 ALLEGRO_EDITOR PLACEMENT Component deleted completely from board file after we Mirror and rotate them while moving them.
771256 ALLEGRO_EDITOR DRC_CONSTR Update DRC consumes system memory and crashes allegro after approx 30 minutes
771423 ALLEGRO_EDITOR SHAPE Shapes - Update to Smooth - Low on available memory please exit the program.
771456 ALLEGRO_EDITOR EDIT_ETCH Allegro 16.3 crashes when using arrow keys
771719 PSPICE MODELEDITOR Can not generate a DEHDL symbol from Model Editor, because no Capture license.
771765 ALLEGRO_EDITOR PADS_IN PADS translation fails to translate symbol
771766 ALLEGRO_EDITOR DRC_CONSTR Moving certain components takes a long time on this board database.
771815 SIP_LAYOUT IO_PLANNER SiP OA co-design flow does not allow a save to the .sip file after modifications in IOP
773072 SIP_LAYOUT ASSY_RULE_CHECK wire to wire same profile
773126 CONSTRAINT_MGR UI_FORMS Constraint Manager "Value Filtering" for Topology Schedule is missing TEMPLATE and "UserDefined"
773179 ALLEGRO_EDITOR PAD_EDITOR pad_designer crashed when attemting to delete internal name layer.
773229 ALLEGRO_EDITOR OTHER Netrev never end importing netlist generated from Capture CIS
773329 ALLEGRO_EDITOR MANUFACT Allegro closes when performing a Linear dimensioning and then selecting the undo icon.
773483 ALLEGRO_EDITOR MODULES place module problem
774036 ALLEGRO_EDITOR INTERACTIV Rats not shown after move->mirror command
774170 ALLEGRO_EDITOR DATABASE DBDOCTOR fixes Error but it reappears and Artwork fails
774602 SCM OTHER ASA crash while working with hierarchy
774643 CONCEPT_HDL CORE DEHDL crash on edit of attributes
775201 ALLEGRO_EDITOR SKILL Color palette can only be changed one time using skill commands
775815 SIP_LAYOUT WIREBOND Unused wire profile once purged using wire profile editor are still available in CM and Color dialog
775826 SIP_LAYOUT WIREBOND Cannot change the Wire Profiles on the wirebonds in this design
775842 SIP_LAYOUT WIZARDS Die text in wizard is changing DIE location when origin set in DIE text file is other than 0, 0
DATE: 04-23-2010 HOTFIX VERSION: 007
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
721859 ALLEGRO_EDITOR OTHER update shape to smooth creates tmp file on remote file server working dir why?
740201 SPECCTRA_MENT_ IMPORT Wrong stackup order after translating from mbs2sp
744797 SIP_LAYOUT OTHER Cannot Copy a connector (IO) symbol in APD and SiP tools
747831 CIS CONFIGURATION There is a delay of 5 to 10 mins in opening SQL database in V16.2 and V16.3. It is fine in V16.0.
747848 CIS CONFIGURATION Unable to configure CIS with Oracle database due to Capture crash.
751372 CAPTURE OTHER Copy / Paste Issue in capture 16.3
757434 ALLEGRO_EDITOR MODULES Allegro hangs the board file after creating Placement Replicate circuit.
759906 CIS PART_MANAGER Property copy from one to several parts doesn't work
760154 PSPICE NETLISTER Model parameter (Tj) is not affecting Smoke Analysis result
761177 CIS OTHER Error Message - Memory exhausted
762602 CIS EXPLORE_DATABASE CIS doesn't open datasheet for parts if it is not stored at default Capture location.
763677 APD EDIT_ETCH The "Via to Via Line Fattening" tool is inconsistent in which clines are changed.
763715 CAPTURE NETLIST_OTHER A long pin name gets truncated upto 31 characters when the wirelist is created.
763878 CONSTRAINT_MGR DATABASE Why Pinpairs disappear after closing Constraint Manager?
764020 CAPTURE NETLISTS Usernetl.dll has changed between 16.2 and 16.3
764101 APD EDIT_ETCH Perpendicular routing through a Region does not work when the region segment is drawn at an angle.
764200 ALLEGRO_EDITOR DRC_CONSTR Via at smd fit drc on a via that is placed fully inside the padstack having custom pad
764903 PSPICE ENVIRONMENT 'Run in Resume Mode' does not work in SPB 16.3
765206 F2B PACKAGERXL Unable to feedback subsequent pin swaps from Allegro
765319 APD DRC_CONSTRAINTS Identical Constraints in Performance Advisor question
765541 SIP_LAYOUT SHAPE Set via oversize value to 3 in dynamic shape instance parameters will make overlap shape.
766147 APD EDIT_ETCH Resize/Respace Diff Pairs does not work on 45 and off angle
766337 SIG_INTEGRITY GEOMETRY_EXTRACT Geometry of Via model Extracted from board file is not identical to Original Via geometry design
766443 ALLEGRO_EDITOR PADS_IN unable to translate PADS ascii to brd in 16.3
766581 CIS CONFIGURATION In 16.3 capture.exe remains memory-resident after exit
767161 ALLEGRO_EDITOR SHAPE The behavior of Add Fillet command is different by Hotfix version.
767217 SIP_LAYOUT IMPORT_DATA The Die-Text In wizard and it is crashing on the "Finish" step.
767598 SIP_LAYOUT WIREBOND Can't wirebond SIP designs as it just hangs.
767832 ALLEGRO_EDITOR DRC_CONSTR Reducing Design Accuracy updates Physical Diffpair constraints wrongly
768822 ALLEGRO_EDITOR SKILL axlSetParam return value is divided by 10 to the power of the design accuracy.
769150 CIS PART_MANAGER Update All part Status on a group changes 揇o Not Stuff?status to 揝tuffed?in V61.3_ISR_5.
DATE: 04-09-2010 HOTFIX VERSION: 006
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
745241 CONSTRAINT_MGR TECHFILE Importing a tcf file automatically enables On-Line DRC.
752587 ALLEGRO_EDITOR PLACEMENT Uppercase File name(XX.mdd) for Placement replicate update on Linux.
753626 CONCEPT_HDL CORE newgenasym error while saving the hierarchical block symbol
753894 CAPTURE OTHER Case sensitive version control S/W
754487 RF_PCB OTHER Various asymmetrical clearance problems uncovered - calculation issues?
758272 CONSTRAINT_MGR UI_FORMS Entering values on the Min/Max Propagation Delays worksheet hangs the application.
758911 PSPICE PROBE Pspice crashes while exporting probe data using our sample project
759871 CAPTURE PROPERTY_EDITOR Save option in Right Mouse Click on property editor of nets doesn't saves all the changes.
759890 SPECCTRA ROUTE Specctra autorouter ignoring prerouted nets
760067 ALLEGRO_EDITOR SHAPE Dynamic Shape not getting filled on board with odd angle placement and routing
760284 CONCEPT_HDL CORE Update Sheet Variables turns of the grid
760480 MODEL_INTEGRIT OTHER Message open clipboard failed when trying to open the rename/reorder dialog in Model Integrity
760667 ALLEGRO_EDITOR PADS_IN The pads_in.exe translate incorrect drill shape from PADS 2005 ascii database.
760741 ALLEGRO_EDITOR MENTOR mbs2brd does not work in 16.3 but works in 16.2
760810 CONSTRAINT_MGR INTERACTIV Deleting Region Deletes NCCs
761114 PSPICE PROBE Refresh issue in Display > Cursor window
761180 ALLEGRO_EDITOR DRC_CONSTR Via_at_smd not working for custom shaped padstacks.
761305 SPIF OTHER Allegro crash when seleting any of the Route - PCB Router - submenu items.
761376 ALLEGRO_EDITOR PAD_EDITOR Wizard_Template_Path is not considered for symbol template look-up ?
761416 ALLEGRO_EDITOR DATABASE Allegro crash on chaning the subclass for group of clines
761492 ALLEGRO_EDITOR SKILL about axlTransformObject function
761518 F2B PACKAGERXL about mismatch library path between cds.lib and actual
761737 ALLEGRO_EDITOR OTHER Running Dbdoctor after executing Skill is giving symbol fit error for the .dra file
762155 ALLEGRO_EDITOR SYMBOL Updating a symbol changes the netname of the cline resulting in drcs.
762181 ALLEGRO_EDITOR OTHER Allegro netrev crashes for long device name in PST* files
762316 ALLEGRO_EDITOR MANUFACT Allegro disappears on Adding dimensions for the symbol file
762792 ALLEGRO_EDITOR PADS_IN PADS_IN fails for SPB 16.3
763108 ALLEGRO_EDITOR SHAPE Z-copy shape create an error like VOID boundary may not cross itself
763134 SIG_INTEGRITY SIMULATION Bit 7 of a simulation is out of sync with rest of bus. It should be the same for all bus values.
763149 CIS GEN_BOM CIS BOM in V16.3 is not correct if database has Quantity field and its value is 0.
763296 ALLEGRO_EDITOR REFRESH The error was happened while doing the SUM
763303 ALLEGRO_EDITOR OTHER SMD Jumper has a problem while using the Add Jumper
763315 ALLEGRO_EDITOR PADS_IN pads_in got error message WARNING ERROR(SPMHDB-205)
763354 ALLEGRO_EDITOR PADS_IN Auto suppress redundant shape while using pads_in translator
763428 ALLEGRO_EDITOR PADS_IN enhance pads_in.exe translate spacing and physical rule into Allegro.
763446 ALLEGRO_EDITOR REPORTS missing fillet is reporting pad without drill
763448 ALLEGRO_EDITOR DRC_CONSTR Performance advisor shows Cset as unused nets when it is assigned to Diff pairs or xnets.
763586 ALLEGRO_EDITOR DATABASE Allegro rounds off the value after decimal in CM
764077 CONCEPT_HDL CHECKPLUS The output predicate in the Graphical environment is not always returning the pin object for an output pin.
DATE: 03-26-2010 HOTFIX VERSION: 005
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
599819 SIP_LAYOUT 3D_VIEWER display soldermask by default in the 3d viewer
735992 CONCEPT_HDL CORE Create Test Schematic does not use the correct package type
743787 SIG_EXPLORER OTHER 16.3 SigXP crash if sigxp.run created by previous version exist.
746320 CAPTURE NETLIST_ALLEGRO Remove Semi-colon from invalid pin-name check during netlisting
746444 ALLEGRO_EDITOR OTHER show element fails to display info on a via if it is in a module.
746726 SIG_INTEGRITY SIGWAVE Save As and Open Dialogs open in last saved directory
750080 CAPTURE NETLIST_ALLEGRO Improve error message ERROR(SPCODD-390)
750606 SIP_LAYOUT ASSY_RULE_CHECK Wire to BF same profile check
751492 CAPTURE FPGA Option to swap the pin-numbers rather than their locations in the Schematic after back-annotation
753834 CIS LINK_DATABASE_PA unable to link multiple database part
753990 F2B PACKAGERXL Delay in opening the subdesign tab in the Export Physical setup in SPB 16.3
754328 LAYOUT TRANSLATORS L2A gives error Subclass name TOP not valid Allegro subcls with s029 hotfix
754434 CONSTRAINT_MGR OTHER allegro crashes when deleting matched group
755111 ALLEGRO_EDITOR INTERACTIV "ALT_SYMBOLS_HARD TRUE" property does not work when I mirrored symbol using move command in 16.3.
756131 PSPICE SIMULATOR Capture crashes while re-running simulation
756148 PSPICE PROBE Zoom Area in Probe Window does not work for digital signal in SPB163
756169 SIG_EXPLORER OTHER Signal Explorer crashing due to sigsimcntl.dat
756176 PSPICE PROBE Trace color is wrongly interpreted in PSpice probe window.
756224 SIG_INTEGRITY SIMULATION Simulation aborts reporting that VIA models have changed
756281 ALLEGRO_EDITOR OTHER Why *.sav file cannot be recovered from PCB Editor utilities?
756673 SIP_LAYOUT ASSY_RULE_CHECK Running ADRC Metal to metal checks causes false X-D DRCs, cannot clear them and trying crashes the tool
756918 ALLEGRO_EDITOR OTHER Allegro angular dimensions working incorrect in 16.3
756932 ALLEGRO_EDITOR CREATE_SYM Create symbol fails with error duplicate pin number
756976 ALLEGRO_EDITOR SKILL axlChangeWidth always return nil in Allegro version 16.3
757000 PSPICE NETLISTER Incorrect Hierarchical Format Netlist created
757406 APD OTHER Implement Segment over void features in APD L
757624 SIG_EXPLORER OTHER Sigxp runtime error when simulation is run and exit without saving the topology
757820 ALLEGRO_EDITOR SHAPE Shape does not void to hole if there is no pad
758009 ALLEGRO_EDITOR OTHER Export > Library (MECH_SYM) adds a new subclass NCROUTE_PATH, data moved from one subclass to another.
758022 CAPTURE DRC Capture crash while running DRC with 揜un Physical Rules?checkbox.
758190 ALLEGRO_EDITOR PAD_EDITOR PCB Editor crashing on pin move in this design
758374 F2B DESIGNVARI Problem with Mechanical part in Variant Editor
758471 SIG_INTEGRITY OTHER Differential impedance does not change on changing the etch effect values.
758490 CIS CRYSTAL_REPORTS Different crystal report output in 16.3 than from 16.2
758498 CAPTURE NETLISTS PCB Editor netlister hangs
758584 APD SHAPE Shape not voiding all elements
758886 ALLEGRO_EDITOR REPORTS Total number of nets is wrong into Testprep Report
759146 ALLEGRO_EDITOR SKILL The title is not displayed in the form by the version.
759339 ALLEGRO_EDITOR ARTWORK artwork output fails by SPB16.x.
759591 ALLEGRO_EDITOR SKILL axlSetParam fails and does not round the value as indicated by the warning message
759816 CONSTRAINT_MGR OTHER Allegro Hangs when double click on a Bus in CM
759947 APD OTHER Need an a way to convert Lines into Clines
760353 ALLEGRO_EDITOR MANUFACT Allegro crashes and creates a .sav file on running the silkscreen command from Manufacture > Silkscreen
760432 ALLEGRO_EDITOR PARTITION Unable to remove fixed property after partition import
760638 ALLEGRO_EDITOR PADS_IN pads_in translator can not handle " PINPAIRGROUP ".
760734 ALLEGRO_EDITOR SHAPE Different therma contacts on rotated partsl
761436 CAPTURE NETLIST_ALLEGRO SPCODD-53 Error when creating netlist with PACK_SHORT
DATE: 03-12-2010 HOTFIX VERSION: 004
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
689495 ALLEGRO_EDITOR DATABASE corrupt database
725944 SIG_INTEGRITY GEOMETRY_EXTRACT xtalk make allegro freeze and never give hands
732604 SIP_LAYOUT SHAPE Shape Issue - added shape will not clear around other elements.
740106 PSPICE NETLISTER The "Enable PSpice AA Support for Legacy" option does not give the Desired Monte Carlo results
744259 SCM UI Signal order reversed when a Vectored Signal name is renamed in reverse
745554 SIG_INTEGRITY GEOMETRY_EXTRACT Time to get Xtalk simulation result in 16.2 is lower than acceptable by comparing the time in 15.7
745595 RF_PCB FE_IFF_IMPORT import iff RF_PCB give an empty block
747133 CAPTURE STABILITY ERROR [DSM0006] Unable to save
747679 CAPTURE STABILITY Trying to Save the Design in 16.2 format gives DSM0006 Error and crashes Capture
750460 CIS FOOTPRINT_VIEW 3D footprint viewer doesn't shows the footprints
750777 SIG_INTEGRITY OTHER Trace impedance showing wrong
751424 ALLEGRO_EDITOR DRC_CONSTR Unexpacted DRC for Shape to Route Keepout
751897 SIP_LAYOUT SPECCTRA_IF Radial Router crashing SiP tool
752029 SCM OTHER Cross probing not working between SCM and Allegro Editor in Linux Environment
752450 APD PADSTACK_EDITOR APD crashes when selecting a User Definable Mask Layers.
752581 PSPICE PROBE Pspice probe window crash
752709 ALLEGRO_EDITOR PLOTTING Sheet content doesnot plots title block
752908 ALLEGRO_EDITOR INTERFACES Output from Export > DXF shows one instance of a via on the wrong layer
753226 ALLEGRO_EDITOR OTHER File > Change Editor doesn't shows the default Product Options
753622 ALLEGRO_EDITOR GRAPHICS Enahnce capture image command to default the save as location to working dir
753773 APD WIREBOND Requesting the option to set the diameter of the default WB_TACKPOINT power ring pad.
753778 APD IMPORT_DATA Import NA2 displays the design momentarily and then crashes
753866 SIG_INTEGRITY OTHER about Select by Polygon after move command
753958 CAPTURE OTHER Capture V16.3 is extremely slow while edting schematics of design placed on network drive via VPN.
754050 ALLEGRO_EDITOR UI_FORMS Why show element window disappears when scriptmode is set invisible
754143 SIP_LAYOUT OTHER SiP Package Design Integrity - running Extra Cline segments generates report without Layer number
754327 ALLEGRO_EDITOR OTHER Rename Sub Class is not working as desired.
754364 ALLEGRO_EDITOR PLACEMENT Crash when applying placement replication
754462 ALLEGRO_EDITOR SHAPE Allegro circular dynamic shape fails to fill
754819 ALLEGRO_EDITOR OTHER Create details shows wrong graphics for filled curves
755176 ALLEGRO_EDITOR PADS_IN Pads translation succeeds in v16.2 but fails in v16.3 on this ASCII file
755256 ALLEGRO_EDITOR OTHER Attached script is crashing the designs in v16.3
755610 CONCEPT_HDL CREFER Cref hyper links does not work for signals where number "0" used to define the zone for page border
755787 ALLEGRO_EDITOR EDIT_ETCH crash using resize_respace_dp command
755881 ALLEGRO_EDITOR DATABASE Swap component crashes application
756092 CAPTURE PROPERTY_EDITOR property editor flickers and loops on value edits
DATE: 02-23-2010 HOTFIX VERSION: 003
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
263504 CONCEPT_HDL CHECKPLUS Checkplus fails to run if crefrpt exists in the design
726836 ALLEGRO_EDITOR SKILL axlGeo2Str() and axlGeoEqual() return different results
730820 SIP_LAYOUT PADSTACK_EDITOR Changing the Via diameter will cause the SiP tool to crash
735193 CAPTURE FONTS Pin_names and Pin_numbers get convertred into darkened blocks in 慫oom to all?view in V16.2.
737307 SIG_INTEGRITY GEOMETRY_EXTRACT differential pair extraction to sigxp fails to extract coupled sparam via models
740936 ALLEGRO_EDITOR SYMBOL Confusing error message during Create Symbol
744191 ALLEGRO_EDITOR EDIT_ETCH Arc routing enhancement
744497 ALLEGRO_EDITOR INTERACTIV PCB Editor Crashes with Data Customization Feature
746572 ALLEGRO_EDITOR DATABASE Reoccuring error in attribute pointer to attribute invalid on dra.
746978 SIG_INTEGRITY SIGWAVE 2 licenses were used for SigXP and SigWave.
747219 SIP_LAYOUT SHAPE Dynamic Filleting not working with odd angles
747593 ALLEGRO_EDITOR PADS_IN Some RULE_SETS cause the PADS translation to fail.
747746 ALLEGRO_EDITOR OTHER Request for more detail in downrev.log file
748033 GRE IFP_INTERACTIVE Enhancement in GRE where Show Element on Bundleshould show the total number of nets that are part of the bundle
748333 ALLEGRO_EDITOR OTHER place by schematic page number not showing pages correctly
748375 ALLEGRO_EDITOR MANUFACT gloss - line smoothing causes crash
748818 ALLEGRO_EDITOR DRC_CONSTR Undesired DRCs shown in allegro 16.3 while moving component and the same are removed by update DRC
748865 CONSTRAINT_MGR OTHER Allegro 16.3 slow to move component with CM open
749009 APD WIREBOND a part of function of the finger alinement doesn't work
749162 SIG_EXPLORER INTERACTIV Unable to proceed after RMB > Preference > Cancel
749307 ALLEGRO_EDITOR MENTOR mbs2brd fails with error VIF_Allegro_Write
749435 CIS DESIGN_VARIANT Cannot create variant part in 16.3
749854 APD PADSTACK_EDITOR The value of user-defined mask layer is not retained in the design.
749891 ALLEGRO_EDITOR PARTITION Unable to delete existing partitions
749949 SIG_EXPLORER EXTRACTTOP A Topology extraction fails using APD and SiP series with the latest hotfix(SPB16.30.001).
750008 CAPTURE NETLIST_ALLEGRO Netlist different in SPB 16.3 and after installing SPB 16.3 hotfix 1
750591 ALLEGRO_EDITOR DATABASE Analyze diff pair object fails to display uncopled lenght values.
750888 SPECCTRA ROUTE specctra is crashing while routing
751204 F2B DESIGNVARI Design difference crashes while reading funcview
751398 ALLEGRO_EDITOR OTHER Allegro Crash when Edit is selected in Setup > Outline > Room outline
751578 ALLEGRO_EDITOR PADS_IN pads_in hangs while conversion
DATE: 02-09-2010 HOTFIX VERSION: 002
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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527012 SIG_INTEGRITY IRDROP Severe Memory leak in IRDrop
623678 PCB_LIBRARIAN CORE PDV freezes when changing grid
672592 ALLEGRO_EDITOR SHAPE Shape does not void correctly untill a clearance oversize value is added
688062 PCB_LIBRARIAN CORE PDV Strange characters appear when copying text into Bus Arrows ( Text symbols)
710170 SIG_INTEGRITY IRDROP Run IR Drop even if all components on the net are not placed.
710174 SIG_INTEGRITY IRDROP Audit function for IR Drop.
726833 PSPICE DEHDL Modify the methodology for migrating 15.7 and 16.2 users of ConceptPSpice
730717 SCM UI Unable to delete a zero connection signal in SLP which has a pull-up
731017 ALLEGRO_EDITOR DRC_CONSTR DRC's show out of date when artwork is run
732145 CONCEPT_HDL OTHER Incorrectly generated VHDL netlist
740123 ALLEGRO_EDITOR GRAPHICS Capture Image command fillin missing from jrl and script files
740278 ALLEGRO_EDITOR OTHER Jumper fucntion for Single Side PCB Design
740656 ALLEGRO_EDITOR GRAPHICS Can we place custdatatips.cdt file on a site level for SPB16.3
741222 CONCEPT_HDL CORE Replace command (in Windows mode) causes crash
742389 ALLEGRO_EDITOR EDIT_ETCH Change or add message when using Countour route
743275 APD DATABASE With DRC enabled, this design seg faults in axldbid.c (solaris only). DRC update takes orders of magnitude longer on sun
743623 F2B PACKAGERXL Pxl error when using pack_ignore on reuse blocks
744348 F2B BOM PART_NAME column getting word wrapped inspite of sufficient space in the HTML BOM report.
745062 CONSTRAINT_MGR OTHER import techfile does not add new layers in cross section
745148 ALLEGRO_EDITOR GRAPHICS Allegro ptf driven HEIGHT value not pushed into 3D Viewer
745301 ALLEGRO_EDITOR DATABASE Allegro 16.3 crsh on moving component
745518 ALLEGRO_EDITOR DRC_CONSTR DRCs not shown when "Enable Antipads as Route keepout is checked in"
745745 SIP_LAYOUT WIZARDS Die Text In changing the pin names on duplicates
745785 CONSTRAINT_MGR UI_FORMS Unnecessary window opens when the cell in PCSet By layer worksheet was clicked.
746002 CONCEPT_HDL CREFER Could not find pc.db in the root design
746010 CONSTRAINT_MGR SCHEM_FTB Updating the brd file using the "Import Changes Only" option overwrites the modified constraints in
746080 CONSTRAINT_MGR OTHER Click Constraint Manager filter icons crash software
746137 APD IMPORT_DATA Import > NA2 not transalating certain layers and padstack sizes
746370 ALLEGRO_EDITOR GRAPHICS Setting infinite_cursor_bug_nt variable flips mouse movement on flip design
746519 CONCEPT_HDL CHECKPLUS CheckPlus the if statement is not seeing the True condition or the output predicate is not returning the True condition.
746546 PCB_LIBRARIAN VERIFICATION con2con choosing incorrect PART_NAME in PTF File during verification
746865 CONCEPT_HDL CORE Tool generated pspice net names in core concept design cause short with copy all.
747636 SIP_RF OTHER RFSIP Layout RF Module Export chips & connectivity is not writing die attach method to chips file
DATE: 01-31-2010 HOTFIX VERSION: 001
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
491042 CONCEPT_HDL SECTION Prevent PackagerXL from changing visibility on SEC attribute
496910 CAPTURE NETLIST_ALLEGRO Inconsistent netlist creation
558783 PSPICE NETLISTER Why do Models with "awb*" prefix need wirte permissions to "*.ind" files?
643241 CAPTURE SCHEMATIC_EDITOR OrCAD crashed while replacing cache
654292 ALLEGRO_EDITOR DATABASE Propagation Delay constraint behaves differently between 16.01 and 16.2
662829 CONCEPT_HDL GLOBALCHANGE Global Update should honor property visibility settings in ppt_optionset
672718 SIP_LAYOUT EXPORT_DATA "Export>Symbol Spreadsheet" should export a .cvf not a .txt
676233 CAPTURE NETLIST_ALLEGRO Cross probing stops working if design name has dots
678739 CONCEPT_HDL CONSTRAINT_MGR Manually added targets in matchgroups lost when reopen CM
690618 F2B BOM Write protected template.bom fails to write callouts
700246 CIS LINK_DATABASE_PA Need option to update symbol always when linking part in CIS
705393 CONCEPT_HDL CORE ConceptHDL crashes while switching to another hierarchy level under File > Plot Preview.
708634 ALLEGRO_EDITOR SHAPE Shapes getting incorrectly displayed in 16.2
708950 CONCEPT_HDL CORE Tool crashes while trying to change the text on the schematic using a text editor.
709823 ALLEGRO_EDITOR OTHER Arcs not converted properly when upgrading symbols
713964 F2B PACKAGERXL Net property Probe_Number is getting changed during the packaging run
718119 F2B BOM Exclude the callout file name from the template.bom file
718496 SIG_INTEGRITY SIGWAVE Frequency at smith chart.
721422 CONCEPT_HDL CHECKPLUS Checkplus fails if "\\" character is used in the parameter list
721788 SCM OTHER SCM unresponsive while closing out a Block without Saving
721801 CONCEPT_HDL CORE Save As crashes DE HDL if an existing page is selected in the design
722653 F2B PACKAGERXL Packaging does not complete
725285 CONCEPT_HDL CORE nconcepthdl does not work same as concepthdl for same script.
725719 CONCEPT_HDL CORE wire pettern of Publish PDF
727062 CONCEPT_HDL CREFER Custom properties not visible for TOC symbol in schref_1 view
727194 CAPTURE CORRUPT_DESIGN Random Capture crash
727704 SCM PACKAGER ASA to PCB getting out of sync
728066 CAPTURE NETLIST_ALLEGRO Allegro PCB Edtior net cannot be generated if PACK_SHORT is used
729214 CONCEPT_HDL CORE SHOW_PNN_SIGNAME directive used with Windows Mode gives crash
730295 SIG_INTEGRITY OTHER Filled rectangle shapes not extracted properly
731183 CIS QUERY_DATABASE CIS Query fails with ODBC Error for query (Price contains 29)
732073 SIP_LAYOUT DXF_IF DXF_OUT generate an incorrect shape
732138 CONCEPT_HDL CORE Cannot change SI model assignments
732216 ADW DBEDITOR dbeditor crashes doing copy-as-new into lib folder that has partially completed chips.prt file
732249 SIG_INTEGRITY SIMULATION Probe sim with custom stimulus cause segmentation fault. Linux only.
732847 ALLEGRO_EDITOR DRC_CONSTR Manual Void uses Shape to Pin constraint to void Holes
733261 FLOWS PROJMGR Project manager does not work with the Restricted User in client server environment
733773 CONCEPT_HDL OTHER Syntax issues in DEHDL
734260 APD COLOR Why subclasses still remain visible even after global visibility is turned off.
734419 CONCEPT_HDL CORE Concept crashes in windows mode when netname is deleted on schematics generated by ASA
734555 CONSTRAINT_MGR SCHEM_FTB Import Logic does not overwrite the Constraints
735290 CONCEPT_HDL OTHER Concept's PDF Publisher has issues.
735892 CONCEPT_HDL CORE "Component Modify" changes visiblilty of Key properties
735977 ALLEGRO_EDITOR MENTOR Mentor to Allegro translation fails without any error message
736071 CONCEPT_HDL CORE Property visibility is not retained on the schematic instance when we modify the component on sch.
736165 SIP_LAYOUT SCHEMATIC_FTB about error message of "schematic to layout"
736167 CONCEPT_HDL CORE HDL crashes when I select BGA symbol in Component Browser
736911 ALLEGRO_EDITOR SHAPE No DRC displayed when Place Bounds are edge to edge
738035 ALLEGRO_EDITOR OTHER Measure function has different result between 15.7 and 16.2 version.
738129 CONSTRAINT_MGR UI_FORMS Need Diffpair Constraints option in Analysis Modes Electrical Options with Performance license
738276 ALLEGRO_EDITOR PLACEMENT No feedback in console window when placing unfound components in Allgero 16.3
738366 ALLEGRO_EDITOR GRAPHICS 3d viewer not showing some connectors with mutliple place bounds correctly
738454 SIG_INTEGRITY FIELD_SOLVERS EMS2D extracts incorrect CPW to Trace spacing
738578 ALLEGRO_EDITOR OTHER scriptmode +w doesnot work on Linux
738869 ALLEGRO_EDITOR OTHER Error msg when cds.lib contains missing SOFTINCLUDE
739116 EMI SIMULATION At EMI simulation on SigXP an extra Sigwave form is launched.
739225 ALLEGRO_EDITOR GRAPHICS Ability to lock the 'Hide Pallette' option
739599 ALLEGRO_EDITOR DRC_CONSTR drc_errchk indic
739628 ALLEGRO_EDITOR SYMBOL Opening a symbol file is crashing allegro.
739653 ALLEGRO_EDITOR SHAPE Shape created in 15.X .dra changes geometry when uprev'd to 16.X
739661 ALLEGRO_EDITOR OTHER Export netlist creates incorrect via_list syntax.
739872 ALLEGRO_EDITOR SKILL Crash while performing axlExtractToFile in 16.3
739934 SIG_INTEGRITY OTHER specctraquest crash on changing signal model
739937 MODEL_INTEGRIT PARSE zero valued estimated parasitics in ibis models
739942 ALLEGRO_EDITOR SHAPE zcopy xhatch shape creates oversize copy
740133 ALLEGRO_EDITOR DRC_CONSTR Same net DRC Update from Analysis Modes runs forever.
740281 ALLEGRO_EDITOR OTHER Jumper components where were placed in PCB disappeared
740309 SIP_LAYOUT DIE_EDITOR Moving a die pad in DIE EDITOR on G69A_U1 causes the die pads to rotate 90 degrees from the design.
740399 ALLEGRO_EDITOR COLOR Cannot automatically load custom color palette in 16.2
741210 ALLEGRO_EDITOR DATABASE Edit >Move; spin creates 'connect record not found' message
741307 ALLEGRO_EDITOR PADS_IN Shapes on some layers is not getting translated from PADS into Allegro
741313 ALLEGRO_EDITOR DRC_CONSTR Add connect slow in 16.3
741778 ALLEGRO_EDITOR COLOR Color pallete in 16.3 is not expanding when maximize dialog
741910 ALLEGRO_EDITOR PADS_IN unable to translate PADS ascii to brd
741939 ALLEGRO_EDITOR PADS_IN PADS to Allegro Translation fails or hangs.
741980 ALLEGRO_EDITOR PARTITION Import of parition does not import etch or vias.
742676 ALLEGRO_EDITOR SKILL Tpoint cannot be moved by using skill.
743161 ALLEGRO_EDITOR SCHEM_FTB Netrev crashing when importing netlist into board file.
743235 ALLEGRO_EDITOR PLACEMENT Allegro crashes when unmatching comp in placement replicate.
743243 CONSTRAINT_MGR TECHFILE Closing CM destroys tcf values when they are set to locked using fObjectNOTReadOnly
743301 SIP_LAYOUT DIE_EDITOR Edit die command creates two extra die pads
743316 CONSTRAINT_MGR DATABASE With Allegro 16.3 Constraint manager takes to long to update
743553 CONSTRAINT_MGR OTHER Net disappears if we cancel the line width edits in CM
noted & thanks
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