16.3 HOTFIX 010可以下载了，呵呵

好快呀！

好快呀！

的确啊，呵呵

有冇搞错,刚刚搞掂09,现在10又来了,有冇谁知道更新了啥东西呀?

DATE: 06-11-2010   HOTFIX VERSION: 010
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
701724  CONCEPT_HDL    CORE             Page Down (PgDn key) Key is unresponsive
722773  ALLEGRO_EDITOR DATABASE         How can i add DUMMY NETS to a Net Class ?
767874  ALLEGRO_EDITOR OTHER            Component Geometry/Pin number not imported.
769644  ALLEGRO_EDITOR SCRIPTS          Why Command line script in non graphical mode prints everything to the screen when working with Windows?
778086  SIG_INTEGRITY  SIMULATION       extracted net yields unrealistic resuts +/- 100v swings
778915  ALLEGRO_EDITOR OTHER            Export library dumps symbols with mechanical pins instead of connect pins
779119  PSPICE         ENVIRONMENT      MC Analysis does not seem to honor Custom Distribution
779161  ALLEGRO_EDITOR OTHER            Getting error-"illegal arguments passed to a dba routine" when connecting CLine to via
779335  SIG_INTEGRITY  SIMULATION       HSPICE sim from PCB SI caused netlist error.
780314  SCM            UI               ASA crashes on paste special.
780345  CONCEPT_HDL    CORE             Pins look garbled when part is vertically mirrored
780811  ALLEGRO_EDITOR SKILL            Request 1k limit of SKILL API be removed.
781111  SIP_LAYOUT     IMPORT_DATA      Import Brd to SiP failed
781259  CONSTRAINT_MGR TECHFILE         Import tech file crashes Allegro

DATE: 06-11-2010   HOTFIX VERSION: 010
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
701724  CONCEPT_HDL    CORE             Page Down (PgDn key) Key is unresponsive
722773  ALLEGRO_EDITOR DATABASE         How can i add DUMMY NETS to a Net Class ?
767874  ALLEGRO_EDITOR OTHER            Component Geometry/Pin number not imported.
769644  ALLEGRO_EDITOR SCRIPTS          Why Command line script in non graphical mode prints everything to the screen when working with Windows?
778086  SIG_INTEGRITY  SIMULATION       extracted net yields unrealistic resuts +/- 100v swings
778915  ALLEGRO_EDITOR OTHER            Export library dumps symbols with mechanical pins instead of connect pins
779119  PSPICE         ENVIRONMENT      MC Analysis does not seem to honor Custom Distribution
779161  ALLEGRO_EDITOR OTHER            Getting error-"illegal arguments passed to a dba routine" when connecting CLine to via
779335  SIG_INTEGRITY  SIMULATION       HSPICE sim from PCB SI caused netlist error.
780314  SCM            UI               ASA crashes on paste special.
780345  CONCEPT_HDL    CORE             Pins look garbled when part is vertically mirrored
780811  ALLEGRO_EDITOR SKILL            Request 1k limit of SKILL API be removed.
781111  SIP_LAYOUT     IMPORT_DATA      Import Brd to SiP failed
781259  CONSTRAINT_MGR TECHFILE         Import tech file crashes Allegro
781287  ALLEGRO_EDITOR DATABASE         dbdoctor removes tespoints from odd angle clines leaving V/L drc
781331  ALLEGRO_EDITOR SCRIPTS          Script executed by command redirection operators is giving different o/p for v16.01 and 16.3
781647  ALLEGRO_EDITOR MENTOR           mbs2brd is defining extra additional testpoint that is not present in Mentor database
781650  ALLEGRO_EDITOR DRC_CONSTR       Update DRC hangs while updating differential pair checks with dynamic phase tolerance added from the logic import
781665  PSPICE         DEHDL_NETLISTER  Error simulating delay component
781688  CONSTRAINT_MGR ANALYSIS         Application hangs on Solaris when executing DRC update
781799  ALLEGRO_EDITOR OTHER            Unexpected results when exporting and importing text parameters
781922  ALLEGRO_EDITOR SHAPE            Pin doesn't connect as a thermal.
782124  CAPTURE        PLUGIN_INTFACE   Bias point display not getting updated for projects on network
782415  SPIF           OTHER            File > Export > Router takes 5 hours to create a .dsn in windows....1.25 hours in Linux.
782566  ALLEGRO_EDITOR PLOTTING         It seems like not work PLOT parameter "Auto Center" on tight paper size.
782628  SCM            NETLISTER        Connection change not updated in the Verilog Netlist
783059  ALLEGRO_EDITOR DRAFTING         Create Detail with "filled pads disabled" doesn't work with irregular shape pad.
783142  SIP_LAYOUT     IMPORT_DATA      import bga text in on connector crashing sip layout
783222  FLOWS          PROJMGR          Edit Physical and Spacing constraints
783241  ALLEGRO_EDITOR PAD_EDITOR       Pad Designer hangs when attempting to save to file.
783283  SCM            IMPORTS          scm crashing with import physical
783301  SIP_LAYOUT     WIREBOND         All Bondfingers not sliding along path.
783496  ALLEGRO_EDITOR MODULES          Problem of module placement.
783813  SIP_LAYOUT     BGA_GENERATOR    Request to add new JEDEC BGA sizes to the BGA wizards standard JEDEC pulldown menu.
784441  APD            OTHER            Users cannot delete layer even everything was deleted
784639  ALLEGRO_EDITOR DATABASE         both dbdoctor and allegro are crashing while opening this database
785100  CONCEPT_HDL    CREFER           Cross Referencer must not call Unix command on Windows platform
785385  ALLEGRO_EDITOR MANUFACT         Allegro Crashes when using Datum Dim with Shapes.

謝謝

谢谢

Thanks

能不能压成RAR格式呀?很多公司限制.EXE文件的下载。谢谢。

太快了,

感谢共享，速度超快

更新真是飞快