allegro 更新网络表出错

各位大侠
我的allegro 在更新网络表的时候  提示遇到一个问题 必须离开，然后就有一个netrev .st  文件
内容如下！
Cadence Design Systems, Inc. netrev 16.2 Thu Apr 28 17:44:12 2011
(C) Copyright 2002 Cadence Design Systems, Inc.
------ Directives ------
RIPUP_ETCH FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY 'F:/allregoe/XC3S4000/sch/allegro';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'F:/allregoe/XC3S4000/pcb/XC3S4000v1.brd';
NEW_BOARD_NAME 'F:/allregoe/XC3S4000/pcb/XC3S4000v1.brd';
CmdLine: netrev -$ -i F:/allregoe/XC3S4000/sch/allegro -y 1 F:/allregoe/XC3S4000/pcb/#Taaaaaa03992.tmp
------ Preparing to read pst files ------
Starting to read F:/allregoe/XC3S4000/sch/allegro/pstchip.dat
   Finished reading F:/allregoe/XC3S4000/sch/allegro/pstchip.dat (00:00:00.14)
Starting to read F:/allregoe/XC3S4000/sch/allegro/pstxprt.dat
   Finished reading F:/allregoe/XC3S4000/sch/allegro/pstxprt.dat (00:00:00.00)
Starting to read F:/allregoe/XC3S4000/sch/allegro/pstxnet.dat
   Finished reading F:/allregoe/XC3S4000/sch/allegro/pstxnet.dat (00:00:00.04)
------ Oversights/Warnings/Errors ------
#1   Run stopped because errors were detected
netrev run on Apr 28 17:44:12 2011
   DESIGN NAME : 'XC3S4000'
   PACKAGING ON Sep 28 2008 21:55:15
   COMPILE 'logic'
   CHECK_PIN_NAMES OFF
   CROSS_REFERENCE OFF
   FEEDBACK OFF
   INCREMENTAL OFF
   INTERFACE_TYPE PHYSICAL
   MAX_ERRORS 500
   MERGE_MINIMUM 5
   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
   NET_NAME_LENGTH 24
   OVERSIGHTS ON
   REPLACE_CHECK OFF
   SINGLE_NODE_NETS ON
   SPLIT_MINIMUM 0
   SUPPRESS   20
   WARNINGS ON
  1 errors detected
No oversight detected
No warning detected
cpu time      0:04:33
elapsed time  0:00:03

我刚开始都好好的，突然这样了，   我新建了了一个PCB，是可以更新网络表，不知道那里出了什么问题还是怎么了！请各位大侠帮忙分析下！谢谢！