- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
hotfix_spb16.3.041
录入：edatop.com 点击：
http://115.com/file/e7ztzzw3#
Hotfix_SPB16.30.041_wint_1of1.exe
或者http://115.com/folder/f10797a434d
http://115.com/file/be4pi3lj#
Hotfix_SPB16.50.013_wint_1of1.exe
更新了哪些地方啊
谢谢分享！
更新了哪些呀
具体更新的内容我也不清楚！呵呵！
多谢共享，这更新实在是比较快，跟不上了啊
多谢了！
谢谢分享
都更更新了什么内容
多谢分享~
好东西
DATE: 12-8-2011 HOTFIX VERSION: 041
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
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875695 SIG_EXPLORER INTERACTIV Enforce Causality check box doesn't work.
944006 ALLEGRO_EDITOR EDIT_ETCH Vias added to shapes behave differently
946293 CONCEPT_HDL ARCHIVER Archiver hangs if there is a whitespace at the end of the path of cref.dat
951919 ALLEGRO_EDITOR OTHER Exported package symbol soldermask and pastemask padstack locations not the same as original
952057 SCM PACKAGER Export Physical does not works correctly from SCM
953018 APD REPORTS Shape affects Package Report result.
953279 SIG_INTEGRITY LIBRARY mkdeviceindex is adding dml file listing in env file
953827 ALLEGRO_EDITOR EDIT_ETCH Snake Breakout function crashed Allegro
953917 CONCEPT_HDL ARCHIVER archcore should handle errors correctly
953971 ALLEGRO_EDITOR MANUFACT NC Drill files not generated correctly when using the option "“separate files for plated/nonplatedholes”
954055 CONCEPT_HDL CREFER Crefer fails with UNC install path
954858 CAPTURE LIBRARY_EDITOR Closed polyline used in pin shape is not appearing while using custom pin in part.
955029 CONCEPT_HDL CORE custom text font size not recognized in symbol view
955133 SIG_INTEGRITY FIELD_SOLVERS The Field solver creates the differential trace model which is reversed T(D1) and T(D2) of bottom side.
955299 ALLEGRO_EDITOR DRC_CONSTR drc text to smd pin does not work any more on this database in 16.3 S039
955338 CONCEPT_HDL CHECKPLUS Need to change PART_NAME
956751 ALLEGRO_EDITOR ARTWORK Import Gerber command does not work correctly
958252 ALLEGRO_EDITOR TESTPREP Resequence testprep with the option - Delete probes too close crashes the design
958945 CONCEPT_HDL CHECKPLUS Checkplus from 16.3 is not running with our "Allegro Design Entry HDL XL (16.5 licenses)
DATE: 10-21-2011 HOTFIX VERSION: 040
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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735439 PCB_LIBRARIAN CORE PDV Moving line-dot pinshapes by arrow keys breaks the pinshape
935438 CONCEPT_HDL COPY_PROJECT Copy Project changes read-only hierarchical block permissions
935836 SCM SCHGEN ASA crashes when generating Flat Document Schematic
937165 SCM SCHGEN Can't generate Schematic
941426 CONCEPT_HDL COPY_PROJECT Copy Project fails - Updating opf view This can't happen！
941814 CONCEPT_HDL CREFER CreferHDL crashes during ScheGen
942522 CAPTURE GEN_BOM Export in excel check mark doesn't invoked BOM in Excel
943032 SCM OTHER ASA is not passing the correct reuse_module name to Allegro PCB layout.
946350 F2B DESIGNVARI Variant Editor rename function removes all components
946419 SIG_INTEGRITY SIMULATION Cannot select component on BoardModel for controller in bus setup form
947789 ALLEGRO_EDITOR MENTOR mbs2brd crashes during translation on the attached design.
DATE: 10-6-2011 HOTFIX VERSION: 039
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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841096 APD WIREBOND Function required which to check wire not in die pad center.
912942 APD WIREBOND constraint driven wire bonding
917887 PCB_LIBRARIAN VERIFICATION Part should not be released if the alt_symbols has errors
923315 SIG_INTEGRITY GEOMETRY_EXTRACT crosstalk simulation fails with TMP popup failure
927950 APD DATABASE My customer name their layout cross section subclass name as “wire” in Die type.
929348 F2B BOM Warning 007: Invalid output file path name
930783 CONCEPT_HDL CORE Painting with groups with default colors
932091 CONCEPT_HDL CORE Prop attached to SIG_NAME property
932871 APD GRAPHICS could not see cursor as infinite
933356 CONCEPT_HDL CORE Net prop display size become 0 if it was attached to SIG_NAME prop.
933532 ALLEGRO_EDITOR COLOR Bad color assign and initialisation during creation of new subclass
934008 ALLEGRO_EDITOR REFRESH refresh symbol updates symbol text to some unexpected values
934533 F2B DESIGNVARI The Variant Editor errors are not written to the variants.lst file
935911 CONCEPT_HDL CONSTRAINT_MGR Mapping of constraints fails after importing layout constraints
936098 ALLEGRO_EDITOR SKILL axlDBCreateCloseShape does not work correctly.
936794 CONCEPT_HDL CORE Unable to select Allegro Design Entry HDL XL
937087 CIS DESIGN_VARIANT Upreved design becomes very slow in Variant view mode. DELEET THE DESIGN AFTER RESOLVING THE ISSUE
937173 CAPTURE OTHER Wrong license information "UNLICENSED" in Capture >> Help >> About
937290 APD PLATING_BAR Plating Bar checks does not recognize connection made through etchback through shape.
937411 ALLEGRO_EDITOR DATABASE downrev_library reading from one directory and writing to another hangs the command.
938143 ALLEGRO_EDITOR CREATE_SYM Why is this Extra Property 'ECSET_MAPPING_ERROR
938281 SIP_RF OTHER export_chips creating bad data when symbol is split and contains V- V+ pins
939918 PSPICE PROBE Print > Preview for output file causes Pspice crash.
940217 CONCEPT_HDL COMP_BROWSER UCB reports 'No Symbol found for the part'
DATE: 09-21-2011 HOTFIX VERSION: 038
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
924448 F2B DESIGNVARI Design does not complete variant annotation
927104 F2B DESIGNVARI Tools > Annotate variants crashes when there are ASCII characters in the property values
928738 PSPICE PROBE Y-axis grid settings for multiple plots
929284 CONCEPT_HDL ARCHIVER archive does not create a zip file
930063 ALLEGRO_EDITOR TESTPREP Test prep crash Allego when it can not create pin escape
930180 CIS LINK_DATABASE_PA Visible property position on schematic get reset on "link database part" operation
930355 SIP_LAYOUT WIREBOND about "wirebond add nonstandard" command
930894 CAPTURE TCL_INTERFACE PDF export doesn't creates property file if some symbols are used in page name/folder name
930978 ALLEGRO_EDITOR SCHEM_FTB 3rd party netin error - Pin is connected to net <netname> not reconnected no longer happens
931248 ALLEGRO_EDITOR DRC_CONSTR Match Group was removed if member nets became xnets.
931274 ALLEGRO_EDITOR DRC_CONSTR Negative Plane Islands waived DRCs reappear after performing update DRC.
932639 SIG_INTEGRITY OTHER Add Connect command hangs for about 14 seconds and then returns.
933145 F2B PACKAGERXL Add Subdesign list is truncated in Force SubDesign Design Name pulldown
DATE: 09-9-2011 HOTFIX VERSION: 037
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
734687 PCB_LIBRARIAN IMPORT_CSV PDV Generation of entity view fails after CSV Import
734718 PCB_LIBRARIAN IMPORT_CSV PDV Import CSV corrupts parts and generates duplicate $PN on some pins
820131 CONCEPT_HDL OTHER Moving symbols to other page will make Allegro components unplaced because logical_path changed.
868712 SCM UI Why can't I modify CAP associated component?
920327 CONSTRAINT_MGR ANALYSIS The TotalEtchLength predicate in Constraint Manager does not work for a netclass with a bus.
922066 CONSTRAINT_MGR ANALYSIS Custom measurement Actual not being cleared when layout changes.
925338 CONCEPT_HDL CORE This application has requested the Runtime to terminate it in an unusual way
925530 SIG_INTEGRITY OTHER Why the single line impedance value for Top and Bottom layers are different for this design?
925976 ALLEGRO_EDITOR MENTOR mbs2brd fails to import data
926503 CAPTURE GENERAL Memory leak Capture/Pspice
926887 CONSTRAINT_MGR CONCEPT_HDL Pin pairs lost after Export Physical
927637 SCM CONSTRAINT_MGR ASA crashes on change root and also performance is too slow.
928286 CONSTRAINT_MGR INTERACTIV The value of pin-dealy has gone with long match group name.
928483 ALLEGRO_EDITOR DRC_CONSTR Running Update DRC removes Via List DRC Error when via is actually not in the list
929174 ALLEGRO_EDITOR OTHER Display mesure get different result between 16.5 and 16.3
929656 ALLEGRO_EDITOR PADS_IN PADS translation fails with Microsoft Visual C++ Runtime Library error
DATE: 08-26-2011 HOTFIX VERSION: 036
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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891079 CONCEPT_HDL CORE DEHDL crashes with large number of commands in Winodws mode
909595 APD LOGIC Inconsistency between export die text out and show element after pin swap
914870 MODEL_INTEGRIT OTHER mergedml fails to merger 2 DML files from the model integrity
916321 CAPTURE GEN_BOM letter limitation in include file
917967 ALLEGRO_EDITOR REFRESH Update symbol resets refdes location for bottom side components only.
919976 APD DATABASE Update Padstack to design crashed APD.
922519 ALLEGRO_EDITOR SKILL add_bviaarray command fails for some clines but not all
923910 CIS PART_MANAGER Copy & Paste operation from Part Manager copies properties only to first section of the part.
924458 SCM OTHER Project > Export > Schematics crashes
924621 ALLEGRO_EDITOR SHAPE Dynamic shapes are disappearing upon updating them to smooth.
925193 SIG_INTEGRITY FIELD_SOLVERS Diffential Impedance (DiffZ0) values computed in the layer stack-up is incorrect
926443 CONCEPT_HDL CONSTRAINT_MGR In new 16.3 "035" ISR Concept2cm will crash with error.
DATE: 08-12-2011 HOTFIX VERSION: 035
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
861956 CAPTURE IMPORT/EXPORT V16.3 is not respecting if the net names were written in LOWER CASE or UPPER CASE in EXPORT FPGA.
868216 PSPICE MODELEDITOR Encryption of subckt names, internal nodes, comments
870247 PSPICE SIMULATOR Encrypt a model and simulate it, info about inside nodes being dumped in the probe file
874010 SIG_INTEGRITY OTHER PCB SI crashes when the Xnet is extracted with VARIANT_TO_IGNORE property.
882567 SIG_INTEGRITY OTHER PCB SI crash if boolean type prop was specified to VARIANT env.
895902 RF_PCB OTHER Alphanumerical allegro pin numbers are unusable in ADS 2009 Update 1
895919 RF_PCB OTHER Round trip Allegro to ADS to Allegro requirement
903102 ALLEGRO_EDITOR OTHER Zcopy shape command for cline seems not to work correctly.
905533 ALLEGRO_EDITOR INTERACTIV Pin numbers for components on BOTTOM Side are moved in Preselect mode,when the BOTTOM layer is invisible
905562 SIG_INTEGRITY SIGWAVE Noise margin seems not to be measured correctly with Eye Measure function.
905777 SIG_INTEGRITY SIMULATION User gets popup message that halts an analysis until it is acknowledged
915630 PCB_LIBRARIAN OTHER Error when running SI Model Interface Comparison using IBIS models
915755 CONCEPT_HDL CONSTRAINT_MGR Cannot view net in SigXP
916462 ALLEGRO_EDITOR DATABASE Edit>Split_plane>create hangs Allgro PCB Editor
916495 ALLEGRO_EDITOR INTERACTIV Pick selects components from invisible (Off ) layer
917434 APD OTHER Stream out GDSII has more pads in output data.
918187 CONSTRAINT_MGR OTHER Missing acGetTotalEtchLength predicate.
918576 CAPTURE DRC Incorrect DRC is reported for visible power pins which are connected to power symbol
919343 ALLEGRO_EDITOR PLACEMENT Place Manual is crashing the board file
919481 CONCEPT_HDL CHECKPLUS CheckPlus isGlobal function is not working
920712 ALLEGRO_EDITOR ARTWORK Program has encountered a problem ... error when creating artwork
DATE: 07-29-2011 HOTFIX VERSION: 034
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
882677 EMI RULE_CHECK bypass_plane_split fail if BYPASS_XXXX_EFFECT_DISTANCE
897196 CIS LINK_DATABASE_PA Schematic Contents are not shown in CIS window while link Dbase part for parts placed from library
902066 ALLEGRO_EDITOR DRC_CONSTR Shape in Region not follow the constrains
903719 ALLEGRO_EDITOR INTERACTIV Nets highlighted by netclass cannot be selected on the canvas to dehilight
903898 PCB_LIBRARIAN GRAPHICAL_EDITOR PDV move symbol graphics and Undo causes corruption in graphics
904287 ALLEGRO_EDITOR ARTWORK some cline with arc is missed, when creating artwork.
905796 CONCEPT_HDL CONSTRAINT_MGR Fujitsu CM issue inaccurate concept2cm diff pair issues
907885 SIG_INTEGRITY OTHER Matchgroup targets lost when importing netlist to Allegro layout in HF31
908057 CONCEPT_HDL CORE DE HDL crash with the cut and paste of a signal name
908060 CONCEPT_HDL CORE CTRL+LMB Option not working correctly in 16.3
908680 SIG_INTEGRITY OTHER Extra prop delay due to resistance
908874 CONCEPT_HDL CORE Part Manager - No Part Found error when using CCR# 775788 feature
909635 SIP_LAYOUT DIE_STACK_EDITOR Add Interposer crashes in SiP Layout
910713 F2B DESIGNVARI Variant Editor crashes when you click web link under “hysical Part Filter” window.
910936 F2B PACKAGERXL ConceptHDL subdesign net name is inconsistent
911415 ALLEGRO_EDITOR COLOR assigned color cannot be removed
912343 APD OTHER APD crash on trying to modify the padstack
912384 PCB_LIBRARIAN CORE PDV Symbol Editor often freezes when moving groups objects by arrow keys
912459 F2B BOM BOMHDL crashes before getting to a menu
912853 APD OTHER Fillets lost when open in 16.3.
913359 APD MANUFACTURING Package Report shows incorrect data
913521 ALLEGRO_EDITOR SCHEM_FTB Netrev error “(40) Object not found in database” for a part which is packaged correctly in FE
913586 ALLEGRO_EDITOR ARTWORK Cannot create the drill figures in this design.
914009 ALLEGRO_EDITOR DRC_CONSTR Diff impedance worksheet showing almost zero impedance for differential pair in attached testcase.
914558 ALLEGRO_EDITOR ARTWORK Gerber6x00 output creates unpainted niche in a shape
915742 CONCEPT_HDL HDLDIRECT I get a newgenasym error and crash when trying to save the symbol
916469 ALLEGRO_EDITOR REPORTS One Unrouted pin does not show in Unconnected Pins Report
DATE: 07-15-2011 HOTFIX VERSION: 033
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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746562 CONCEPT_HDL CORE Deleting attribute causes other property value to move/change
902349 CAPTURE LIBRARY Capture crashes while closing library
903171 PSPICE NETLISTER Why Capture is treating hierarchical power ports as floting nets in complex heirarchy designs?
903713 ALLEGRO_EDITOR PARTITION Placement Replication do not work fine in the Design Partition
905337 CONCEPT_HDL CORE ConceptHDL crashes after Import Design process.
906153 ALLEGRO_EDITOR SCRIPTS Unable to run allegro script in batch mode on the attached board.
906517 PSPICE PROBE PSpice new cursor window shows incorrect result.
906627 ADW COMPONENT_BROWSE ppt options are not read if ucb is launched from FM. works fine if launched from dehdl.
906750 ALLEGRO_EDITOR PARTITION Importing design partition removes the testpoint reference designation
906874 PSPICE NETLISTER Error less than 2 connections for unconnected hierarchical pin
907095 F2B OTHER Part Manager does not show Error as Undefined when directive ptf_mismatch_exclude_inj_prop is used
908000 SIG_INTEGRITY OTHER Inconsistence z-axis delay reported on Tpoint when define at via location.
908595 APD 3D_VIEWER Cadence Design 3D viewer" screen pops up and is all black because the colors have all converted to b
908849 CAPTURE ANNOTATE Getting crash while annotating the attached design
909760 SIP_LAYOUT MANUFACTURING Create bond finger solder mask doesn't follow the mask opening as defined in the padstack
909861 F2B PACKAGERXL NetAssembler broken within the latest 16.30.031
DATE: 06-22-2011 HOTFIX VERSION: 032
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
774270 F2B PACKAGERXL Require to ignore space in Pattern setting to prevent duplicated Refdes.
833542 CONCEPT_HDL CORE PDF publisher font is NOT WYSIWIG with respect to what seen in DE HDL
893544 ALLEGRO_EDITOR INTERFACES IPC-D-356A netlist issue with BB vias.
893765 ALLEGRO_EDITOR PARTITION Mail command not sending out email on Linux platforms.
895933 APD DATABASE Update Symbol shifts the center of the Dynamic Fillet and creating DRCs
897484 SCM CONSTRAINT_MGR No match found for 'fileops.txt' in the search path
899556 ALLEGRO_EDITOR ARTWORK Import artwork seems not to work correctly.
902959 CONCEPT_HDL HDLDIRECT HDLDirect Error while saving design
903680 CONSTRAINT_MGR ECS_APPLY Constraint Manager not passing all hiearchical member objects to a custom measurement.
904403 ALLEGRO_EDITOR DATABASE Allegro crashes when refreshing module
904771 ALLEGRO_EDITOR MANUFACT Pin Number display issue.
905144 CONSTRAINT_MGR ECS_APPLY Min Line Spacing is larger than Primary or Neck Gap less(-) Tolerance but No Warning in CM
905273 ALLEGRO_EDITOR MANUFACT Drill legend creates more tables than nclegend creates tapes
905314 F2B PACKAGERXL Import physical causes csb corruption
DATE: 05-28-2011 HOTFIX VERSION: 031
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
606959 ADW COMPONENT_BROWSE Key properties with blank values are not getting read in shooping cart
644122 SIP_LAYOUT OTHER SiP Layout - xsection - ERROR Adjacent conductive layers are not allowed, but these are diestack layers not conductor
799014 CONCEPT_HDL CONSTRAINT_MGR concept2cm errors not shown in export physical after hier_write
866830 SCM REPORTS Multiple lines added as separator between title block and report header instead of single line
866833 SCM REPORTS Extra indentation is left in the left side of the report when the Line Numbers are set to OFF
868618 SCM IMPORTS Block re-import does not update the docsch and sch view
869971 SCM OTHER Lower level hierarchical block schematics missing $LOCATION values
877091 CAPTURE SCHEMATICS DSN file size becomes very large after placing picture and not change after deleting it
879361 SCM UI SCM crashes when opening project
879496 CONCEPT_HDL OTHER Customer wants to have “the tabulation” key as separator in HDL BOM.
883760 PCB_LIBRARIAN METADATA Incorrectly formatted revision.dat file in the metadata folder
885391 SIG_INTEGRITY SIMULATION RLGC data sampling algorithm and w-element interpolation.
886007 CONCEPT_HDL CORE All the read only pages are called PAGE1 in our hierarchical design
889426 CONCEPT_HDL CHECKPLUS CheckPlus does not find single node net
892375 ALLEGRO_EDITOR PLACEMENT Place Replicate Update disband other groups, irrespective Fixed property added or not.
892541 SIG_EXPLORER OTHER Export/Import layerstack through the technology file is changing the layer thickness
893743 APD EDIT_ETCH Route behavior when spanning pads not as expected.
894499 SIG_INTEGRITY LIBRARY Tool crashes when moving a cline or selecting the Info icon with OpenGL on.
894582 APD SHAPE When making a dynamic xhatch Via shapes surrounding are abnormal.
895542 SIP_LAYOUT WIREBOND SIP design crashing when moving bond finger using blur mode BLUR_BONDFINGER_PRESRV_CON
895591 ALLEGRO_EDITOR PCAD_IN Importing PCAD file fails to get to the point where we can map layers
895757 APD ARTWORK Import Gerber command could not be imported Gerber data
895964 CONCEPT_HDL CHECKPLUS The CheckPlus command “getFileSubstrings” is not working correctly
896302 CAPTURE LIBRARY Pin spacing option in Generate Part from spreadsheet
896428 SCM UI Changed Ref Des value not maintained in DEHDL block when part is replaced
897362 CONSTRAINT_MGR TDD Unable to create Region Class in Constraint Manager
897654 CAPTURE EE_INTERSHEET_RE Capture crashes on adding intersheet refernces in abbreviated format on attached design.
898941 ALLEGRO_EDITOR REFRESH update symbol moves refdes location of component placed on bottom side
899344 RF_PCB BE_IFF_EXPORT dlibx2iff does not provide the component boundary drawing
900175 CONCEPT_HDL CONSTRAINT_MGR Few Xnets are lost from Match Group after packaging and importing the netlist to board file.
900481 CONCEPT_HDL CORE Genview creates a larger symbol without taking the no. of pin in consideration
900813 ALLEGRO_EDITOR DRC_CONSTR With rotated pads, pad (pin - via) soldermask spacing DRC is unreasonable.
900905 PSPICE STABILITY Simsrvr crash and RPC Server unavailable error while running simulation.
901909 APD EXPORT_DATA The "package_pin_delay_length.rpt" with Z-axis delay turned on seems wrong
902133 CIS OTHER The visible part property value are being shown very distant from part graphics on schematic
902166 SPECCTRA ROUTE Specctra crashes when reading in "bestsave.w" file
902177 CONSTRAINT_MGR CONCEPT_HDL Option to view the layer thickness in CM worksheet through worksheet customization
902463 ALLEGRO_EDITOR INTERACTIV APD crashes when we click ( show element ) on certain components
902909 APD WIREBOND die to die wirebond crash
902933 ALLEGRO_EDITOR PADS_IN Pads_in fails while reading PADS ASCII file body
DATE: 05-14-2011 HOTFIX VERSION: 030
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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738247 CONCEPT_HDL HDLDIRECT Generate View hangs
803147 CIS LINK_DATABASE_PA Link DB part should not change RefDes of multi package part
837640 CIS GEN_BOM date format of CIS BOM has broken macros of 16.2 in 16.3 version
838763 CAPTURE GENERAL Deadlock situation is reached while opening BOM reports ("<something>.BOM" cannot be opened)
858245 CAPTURE IMPORT/EXPORT PCAD import does not work in 16.3
860905 SCM UI Part cannot be replaced after it's added
869528 CAPTURE SCHEMATIC_EDITOR Refdes increment on copying part is not with respect to occurence value.
873402 SIP_LAYOUT LOGIC pin swap for co-design die in SiP
877994 CONCEPT_HDL CONSTRAINT_MGR Assigning ESpice model to active component with Class
883164 ALLEGRO_EDITOR INTERACTIV Vias marked fanout moves away from position when moving component
887442 APD SHAPE Copper pour of Dynamic shapes on Top layer which contains many existing signal traces fails.
887477 CAPTURE NETLIST_OTHER Other netlist is missing some nets and components after refdes changes in the design
887578 SCM AUTO_UI Component Replace pops-up the DSPANE-204 Message
887926 SIG_INTEGRITY GEOMETRY_EXTRACT Field solution failed if diff trace on bottom doesn't have reference plane.
888414 SIG_EXPLORER OTHER View Trace Parameter display the thickness of dielectric incorrectly.
888600 CONCEPT_HDL CREFER Cross References not added to Schegen schematic
888804 ALLEGRO_EDITOR OTHER Fillet will become static shape after import from partition board.
888945 CONCEPT_HDL OTHER unplaced component after placing module
889365 SIG_INTEGRITY GEOMETRY_EXTRACT top/bottom trace impedances extracted to sigxp are wrong in 16.3
889404 ALLEGRO_EDITOR OTHER Incorrect pad size for Top conductor padstack written to column 59-62.
889636 ALLEGRO_EDITOR MANUFACT Incorrect spelling of "Visibility" in "Film Control" tab in the Artwork Control Form
891235 F2B PACKAGERXL Packager crashes without creating a pxl.log file
891856 ALLEGRO_EDITOR EDIT_ETCH crash when sliding diff pairs
892455 ALLEGRO_EDITOR SYMBOL Why the overlapping pins are not reported with DRC?
892766 APD WIREBOND Excuting Finger moving cannot push aside finger to move with together by shove all mode
892907 ALLEGRO_EDITOR DRC_CONSTR DRC not reported for etch_turn_under_pin violations
892991 APD BGA_GENERATOR BGA Text In Wizard creating two refdes text at the same location.
893295 APD WIREBOND Why move wirebond command does not shove wirebonds? This result in drcs.
DATE: 04-22-2011 HOTFIX VERSION: 029
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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789198 CAPTURE PROPERTY_EDITOR Newly added user property to a symbol can not be moved on the schematic page.
812501 CAPTURE NETLIST_OTHER Extension of PADS netlist is .NET in V16.3. It should be .ASC.
842161 CIS GEN_BOM CIS standard BOM taking long time
844125 CAPTURE NETLISTS Normal and convert view placed in same design don't get netlisted due to duplicate power pin names.
847688 CAPTURE PROPERTY_EDITOR Property Editor changes selection on Display
851044 CAPTURE GEN_BOM "Export BOM report to Excel" does not appear in the Standard Bill of Material Window.
862785 CAPTURE NETLISTS RINF netlist with net attributes generetaed by capture 16.3 is not getting loaded in CADSTAR tool
868118 CAPTURE NETLIST_ALLEGRO Differential pairs not getting netlisted in hierarchical design.
880219 CIS GEN_BOM Standard CIS BOM does not viewed properly if underscore presents in Part_Number property
881792 ALLEGRO_EDITOR SHAPE Cannot Delete the Islands on the shape. No Error reported.
882128 SPECCTRA HIGHSPEED Difference in length report between Allegro and SPECCTRA
883224 SIG_INTEGRITY SIMULATION crash while reflection simulation from Constraint Manager
883291 SIG_INTEGRITY OTHER Z-axis delay causes incorrect actual values for delay
883971 APD EDIT_ETCH APD crashed when I tried to add cline in (-6674.79 -7506.74) via.
884061 CAPTURE SCHEMATIC_EDITOR multi-line text zoom doesn't work correctly
884181 ADW DBEDITOR Parts get released anyway without any errors flagged.
885019 CAPTURE GEN_BOM Create BOM causes Capture crash with include file
886437 ALLEGRO_EDITOR SHAPE Change of behavior of NET_SHORT between 16.2 and 16.3
887190 ALLEGRO_EDITOR PADS_IN getting parse error during PADS to Allegro Import
887348 ALLEGRO_EDITOR MENTOR mbs2brd translator crashing without any error message in attached testcase -v16.3s027
DATE: 04-8-2011 HOTFIX VERSION: 028
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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704398 CONCEPT_HDL CORE In Windows mode basic shortcuts do not work when in German language
771137 ADW LRM LRM reports 'Injected Mismatch' for a value based on capitalization of ptf value
872547 CONCEPT_HDL CORE Document schematic - Published PDF is missing Bookmarks
875001 CONSTRAINT_MGR OTHER Click on the Constraint Manager selected net filter icons crash software.
875039 CONSTRAINT_MGR ANALYSIS RPD margin is not calculated in 16.3
876275 CONCEPT_HDL CONSTRAINT_MGR Constraint Manager not retaining target net
877912 APD DRC_CONSTRAINTS Shape to Shape DRC seems to be behaving inconsistenly above 90 um spacing on mcm database.
878022 CONCEPT_HDL CONSTRAINT_MGR NO_XNET_CONNECTION is not working unless defined on last discrete before receiver
878519 SIG_EXPLORER OTHER View Trace Parameter - stripline trace model display incorrect distance to the reference plane
879529 CAPTURE NETLISTS Misleading bus/pin ERROR [NET0081] message from PSpice netlist
881455 ALLEGRO_EDITOR INTERFACES Some Drill Figures missing while Exporting DXF
881711 ALLEGRO_EDITOR SCHEM_FTB Spacing constraints(Net Class) from schematic are not transferring correctly to the layout
882277 ALLEGRO_EDITOR DRC_CONSTR Get Bogus (false) "Thru Pin to shape spacing" DRC for Oval slotted pads.
882408 SCM SCHGEN Export physical fails due to netlisting error with the ASA exported schematic
882796 APD OTHER GDS stream import results in a set of bumps misplaced... possibly rotated 90 degrees
DATE: 03-25-2011 HOTFIX VERSION: 027
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
820901 EMI SETUP Request EMC system.conf file that can be read from CDS_SITE.
861999 ALLEGRO_EDITOR DRC_CONSTR DRC hang after padeditdb
862463 CONCEPT_HDL RF_LAYOUT_DRIVEN Rotating and Mirroring RF components in DE-HDL requires RFFLIPMODE property to be correctly updated
867223 ALLEGRO_EDITOR SHAPE Shape fill disappears when Negative shape is converted to Positive in Cross Section
868733 CONCEPT_HDL ARCHIVER ASA Archiver not saving the entire design.
871548 ALLEGRO_EDITOR MENTOR Shapes missing after mbs2brd translation
872003 SIG_EXPLORER SIMULATION TDR simulation results were different between 15.7 and 16.3.
872464 CONCEPT_HDL CORE DEHDL script works in SPB16.2 but not in SPB16.3
873772 SCM CONSTRAINT_MGR Importing a block results in subblocks coming in without properties
874335 SPECCTRA ROUTE Route Custom crashes SPECCTRA after routing for some time during "Running Route Phase".
874989 CAPTURE SCHEMATICS Schematics jumps to another page after a mouse click
875161 CAPTURE NETLISTS Creating Allegro netlist hangs Capture
875411 ALLEGRO_EDITOR NC NC drill produces Error processing extract . Program terminated.
876004 ALLEGRO_EDITOR SHAPE Unused pad suppression problem in Allegro v16.3 since S020~S024
876045 ALLEGRO_EDITOR SHAPE Oval hole drills do not void shape with hole shape drc when the regular pad is smaller than hole
876168 SPECCTRA_MENT_ IMPORT option to have a switch to prevent merging of plane layers during mbs2sp
876210 ALLEGRO_EDITOR SHAPE When updating shapes to Smooth the tool will hang.
876284 ALLEGRO_EDITOR DATABASE Executing SKILL file crashes Allegro
877057 ALLEGRO_EDITOR MENTOR Footprints are shifted when importing from boardstation
877549 SIP_LAYOUT WIREBOND Wirebonds not moving correctly when on an Interposer smaller than the die.
877862 APD WIREBOND APD crashed when add Wirebond without any dump and cannot record script.
878199 CIS DERIVE_NEW_DB_PA Change in Regional Setting causing problem in derive database
878216 APD OTHER stream_in - Stream file scan failed
878400 APD WIREBOND unable to add a wire bonding on few die pad
DATE: 03-11-2011 HOTFIX VERSION: 026
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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851882 SCM SCHGEN Multiple issues with the ASA generated schematic in preserve mode while using square bracket
852063 ALLEGRO_EDITOR EDIT_ETCH What is being displayed in the HUD when a percentage is specified as a tolerance?
854502 ALLEGRO_EDITOR DRC_CONSTR DRC not detected until DBDoctor is executed. Status form and sum dwg report are incorrect.
856797 EMI RULE_CHECK Arc segments were detected as warning by bypass_plane_split.
859213 PCB_LIBRARIAN CORE $LOCATION size in PDV and DEHDL differ
860772 ADW PCBCACHE Save Shopping Cart (pcbcache) is crashing component browser
862259 SIG_INTEGRITY FIELD_SOLVERS EMS2D run twice during View Topology.
865158 ALLEGRO_EDITOR SHAPE Shapes are not voided with Dynamic Shape Fill modes with Regions
865295 PCB_LIBRARIAN CORE Part Developer crashs with symbols having Japanese notes
866095 PCB_LIBRARIAN EXPORT_OTHER Export DE HDL part to Capture Part Crashed
866835 SCM UI User arguments not used over project arguments for new tool
867102 CAPTURE LIBRARY Incorrect pin number gets assigned to pin if a PDF is opened before writng the pin number.
868092 CAPTURE GEN_BOM Capture BOM in V16.3 is different than that of V16.2 for attached test case.
868517 ALLEGRO_EDITOR ARTWORK A pinhole was made in the artwork file.
868646 ALLEGRO_EDITOR SCHEM_FTB Change in the PIN_GROUP at the chips level not propagated to the board file does not allow the swap
868844 PCB_LIBRARIAN CORE BUBBLE_GROUP with no value causes problematic symbol
869326 CIS DESIGN_VARIANT View Variant is not showing part as Do Not Stuff
869547 ALLEGRO_EDITOR SCHEM_FTB Error while parsing the alternate symbol
869931 SIG_INTEGRITY OTHER DML Library Management rewrites library longer then 512 characters into multiple lines.
869960 F2B PACKAGERXL PART_NAME property added to Export Packageable schematic parts
870392 APD EDIT_ETCH Route > Slide not performing as expected in 16.3
870704 ALLEGRO_EDITOR PARTITION 2nd import of parttiotion unplace components in master
871177 CAPTURE LIBRARY Keyboard shortcut for closing the Place Part window
871552 PSPICE SIMULATOR Pspice tool crash
871643 ALLEGRO_EDITOR INTERFACES IDF in batch and GUI for dra files fails to calculate extents correctly
871968 ALLEGRO_EDITOR COLOR After using Clear All Nets, Color Dialog box needs to be reopened for adding custom colors.
872352 APD WIREBOND Move Guide paths crashed APD.
872380 CONCEPT_HDL COMP_BROWSER DEHDL crash when editing the ppt_optionset.dat file from Part Manager.
872450 APD WIREBOND Wire to die edge angle remains highlighted in red for wire bond status window in v16.3
872787 APD WIREBOND Some Unused Wire profiles be purged but still existing in Bond Wire Profile of Color Visibility?
873217 ALLEGRO_EDITOR TESTPREP Testpoint generation not working correctly
873500 APD REPORTS Total Plating value is 0
873505 APD MANUFACTURING fillet size changed when recreate Plating Bar
873600 APD OTHER When attempting to Display Pin Names the tool takes a very long time.
874341 ALLEGRO_EDITOR OTHER "Gloss>Convert corner to arc" command made an unnecessary circular arc.
DATE: 02-26-2011 HOTFIX VERSION: 025
===================================================================================================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================================================================
746063 CIS OTHER CIS Query Does not display initial search results
779588 ALLEGRO_EDITOR PLACEMENT Symbol outline not rotated with component.
805616 ALLEGRO_EDITOR ARTWORK Allegro produces warning about database extents exceed film size
843145 CONCEPT_HDL CORE Cannot copy grayed out properties in the Attributes form to the buffer
845607 ALLEGRO_EDITOR EDIT_ETCH Sliding with arc gridless enabled leaves extra segments behind and 45 degree segment.
850428 SIG_EXPLORER SIMULATION SigXP failed to simulate the topology with designlink.
853665 SPECCTRA CHECK Scheduling violations reported incorrectly.
855534 CONSTRAINT_MGR OTHER formula result does not update when length changed
855793 CONCEPT_HDL CORE Rename Pin on Block is not working in DE HDL with HF 21
856306 ALLEGRO_EDITOR INTERACTIV Modifying pad instance corrupts db
859437 SIG_INTEGRITY GUI Log Scale setting of EMS2D was cleared by re-open design.
859850 SIG_INTEGRITY GEOMETRY_EXTRACT Allegro freeze during topology extraction with EMS2D.
860366 CAPTURE CONNECTIVITY Netlist is different in V16.3 than in V16.2
860809 F2B BOM Bomhdl failed to create the design view check for existance of the packaged directory
861027 CONSTRAINT_MGR CONCEPT_HDL Unable to synchronize the constraints
862137 SIP_LAYOUT
