关于16.6

目前刚看到发到10了，修补功能未知。

刚才看到了，第10个

DATE: 05-24-2013   HOTFIX VERSION: 010
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1084716 ALLEGRO_EDITOR OTHER            Getting an MPS error when updating CM from SigXplorer
1111430 FSP            CAPTURE_SCHEMATI Auto-resize the schematic sheet so that hierarchical block fits within border
1119007 CONCEPT_HDL    CORE             PDF Publish of schematic creates extremely large PDF files
1121020 FSP            MODEL_EDITOR     Cut-Paste from Excel causes empty cell in Rule Editor
1124610 PSPICE         SIMULATOR        Attached design gives "INTERNAL ERROR -- Overflow" in SPB116.6
1125330 FSP            CAPTURE_SCHEMATI FSP generates OrCAD schematics with components (Resistors) outside page border
1131775 ADW            LRM              LRM error with local libs & TDA
1131868 CONCEPT_HDL    CONSTRAINT_MGR   Many net-class constraints "fell off" the design after uprev and Import Design of GEP4
1132080 ALLEGRO_EDITOR PLOTTING         Size of the logo changes after File > Import > Logo
1134956 SPECCTRA       HIGHSPEED        Route Automatic fails with error when Impedance rules are turned ON in Allegro CM.
1135548 SIP_LAYOUT     SHAPE            This design shows two areas with shape shorting errors that should not occur
1138312 ALLEGRO_EDITOR MANUFACT         NCROUTE is not generated for filled rectangle slot ?
1139433 ALLEGRO_EDITOR GRAPHICS         embedded netnames not displayed or getting very small upon panning after exiting 3D Viewer.
1139509 CONCEPT_HDL    CORE             The LRM update changes npn device to resistor
1140752 ALLEGRO_EDITOR PLACEMENT        Moving a place replicate module crashes allegro
1141314 SIP_LAYOUT     SYMB_EDIT_APPMOD Design will lock up after changing the border using Edit Boundary in Symbol edior mode.
1141751 ALLEGRO_EDITOR INTERFACES       Allegro Crashes with Export IPC2581.
1142478 CONSTRAINT_MGR INTERFACE_MAPPER adding constraint to netgroup causes CM & PCB SI to crash
1142884 ALLEGRO_EDITOR OTHER            Boolean type user defined property doesn't export to the PDF
1143199 SIP_LAYOUT     DIE_EDITOR       Enable bump remastering
1143654 SIP_LAYOUT     DIE_EDITOR       Add X&Y offset when adding or moving a pin in die editor
DATE: 05-9-2013    HOTFIX VERSION: 009
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
961420  ALLEGRO_EDITOR PLACEMENT        Regardless of the aspect ratio for room of side The QuickPlace by room command could be placed comp
1079862 ALLEGRO_EDITOR SKILL            Ability to create IPC2581 layer mapping file by Allegro Skill function
1080734 CONCEPT_HDL    CORE             Repainting of grid lines during pan or by moving window show as solid white lines instead of gray da
1104145 ALLEGRO_EDITOR SCHEM_FTB        User defined properties do not appear in PCB
1107547 SCM            OTHER            v15.5.1 tcl/tk code not recognised in 16.6
1110209 CONCEPT_HDL    OTHER            We can move symbols and wires off grid despite the site.cpm grid lock
1117825 CONCEPT_HDL    OTHER            SHOW_CONSOLE_ON_LAUNCH throws an unrecognized directive warning in the schematic editor
1118874 ALLEGRO_EDITOR INTERFACES       Oblong pad shapes are not shown with correct orientation after DXF export from Allegro
1121873 ALLEGRO_EDITOR INTERFACE_DESIGN Importing Bundles from Net Groups does not allow any further editing.
1122933 CONCEPT_HDL    CORE             Newly added Toolbars are getting invisible after re-staring Concepthdl
1124587 ALLEGRO_EDITOR INTERACTIV       The Shape Expansion/Contraction command should also be available in EE mode.
1125895 SIP_LAYOUT     LEFDEF_IF        Tool crash while moving the slider in the Filter options Macro tab form of the co-design die library manager
1125962 F2B            DESIGNVARI       Custom Text in Variant Details dialog box is inconsistent
1126096 SCM            REPORTS          Two nets missing in report
1126134 SIG_INTEGRITY  GEOMETRY_EXTRACT Attempting to extract topology hangs APD
1126182 ALLEGRO_EDITOR DRC_CONSTR       Shape fillet DRC in same net thru via to thru via was removed after update DRC.
1130280 ALLEGRO_EDITOR MANUFACT         stream_out command in 16.6 seems hard coded to look for a design called stream_out.brd
1130737 F2B            PACKAGERXL       Error - pxl.exe has stopped working
1131650 ALLEGRO_EDITOR PLOTTING         PDF Publisher doesnot display few component defination properties in Property parameters
1131764 ALLEGRO_EDITOR EDIT_ETCH        Line segment will not slide using the New Slide.
1132638 ALLEGRO_EDITOR DFA              'dfa_update' crashes when running the utility on the attached foder.
1133311 ALLEGRO_EDITOR SKILL            ?origin switch is not working correctly with axlTransformObject while rotating shapes
1133893 SIP_LAYOUT     IMPORT_DATA      netlist-In Wizard crashes
DATE: 04-26-2013   HOTFIX VERSION: 008
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
876711  ALLEGRO_EDITOR GRAPHICS         Mouse wheel will only zoom out using Win7 64 bit
1080386 CONCEPT_HDL    CORE             Unable to highlight netclass on every schematic page using Global Navigation
1082587 FSP            FPGA_SUPPORT     Support of Xilinx's Zync device
1105286 FSP            DE-HDL_SCHEMATIC FSP crashes while creating board in Schgen if it does not find any available license.
1105461 ALLEGRO_EDITOR DRAFTING         Dimension Enviroment deletes Diameter symbol whenever we add anything to Text section
1105504 PCB_LIBRARIAN  CORE             PDV on Linux Move pins by arrows does not stop when release arrow key but keeps on running
1110126 ALLEGRO_EDITOR GRAPHICS         Display Hole displays strange color.
1113518 CIS            DESIGN_VARIANT   Incorrect Variant information in Variant View Mode for multi-section parts with occurrence
1117580 SCM            OTHER            DSMAIN-335: Dia file(s) error has occurred.
1117845 FSP            DE-HDL_SCHEMATIC Schematic Generation fails without a reason
1119864 FSP            TERMINATIONS     Auto-increment the pin number while mapping terminations.
1120250 ALLEGRO_EDITOR MANUFACT         Why is the parameter File altered?
1120414 ADW            LRM              TDO Cache design issue
1121044 SIP_LAYOUT     SKILL            axlDBAssignNet returns t even when no net name is assigned to via
1121148 ALLEGRO_EDITOR PLACEMENT        Ratsnests turns off when moving symbols with Net Groups
1122440 ALLEGRO_EDITOR DATABASE         Cannot unlock database using the password used to lock it
1122449 ALLEGRO_EDITOR DRC_CONSTR       Uncoupled length DRC for diff pair shows different actual length value between show element and CM.
1122990 ALLEGRO_EDITOR INTERACTIV       RF PCB Symbol which is part of Reuse Module cannot be replaced
1123083 ALLEGRO_EDITOR PLACEMENT        Saving after mirroring a Place replicate mdd create a .SAV board file.
1123257 SIG_INTEGRITY  SIMULATION       some of the data signals at the receiver are not simulatable
1123764 CONSTRAINT_MGR OTHER            Allegro crash while importing DCF file
1123816 CAPTURE        PART_EDITOR      Movement of pin in part editor
1124183 ALLEGRO_EDITOR EXTRACT          Output from EXTRACTA gets corrupted with refdes 50
DATE: 04-13-2013   HOTFIX VERSION: 007
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1107397 SIP_LAYOUT     PLACEMENT        Place Manual-H rotates die
1111184 ALLEGRO_EDITOR PLACEMENT        NO_SWAP_PIN property does not work in 16.6
1112295 APD            DXF_IF           Padstacks� offset Y cannot be caught by DXF.
1113284 ALLEGRO_EDITOR INTERFACE_DESIGN Rats disappear after moving components
1113317 CONCEPT_HDL    SKILL            skill code to traverse design not working properly
1115491 ALLEGRO_EDITOR SKILL            telskill freezes command window
1115625 ALLEGRO_EDITOR SKILL            Design extents corrupted when axlTrigger is used.
1115708 ALLEGRO_EDITOR INTERFACES       Export DXF is outputting corrupt data on one layer.
1115850 ALLEGRO_EDITOR GRAPHICS         Text edit makes infinite cursor disappear
1116530 ALLEGRO_EDITOR MANUFACT         Import artwork show missing padstacks
1117498 ALLEGRO_EDITOR DATABASE         Why does dbstat flag LOCKED?
1118407 SIP_LAYOUT     DIE_EDITOR       net connectivity is getting lost when running die abstract refresh
1118413 SIP_LAYOUT     DIE_EDITOR       pin number is getting changed when running die abstract refresh
1118526 CONCEPT_HDL    CONSTRAINT_MGR   Upreved design now has Constraint packaging errors
1118830 ALLEGRO_EDITOR SHAPE            Performance issue when moving/refreshing shapes in 16.6
1119784 ALLEGRO_EDITOR INTERACTIV       ipickx command gives drawing extent error inconsistently
1120469 SIP_LAYOUT     DIE_ABSTRACT_IF  use different padstack for different, but look-alike bumps
1120669 CONCEPT_HDL    CORE             DEHDL crash on multiple replace of hier blocks
1120810 ALLEGRO_EDITOR EDIT_ETCH        Cannot slide cline segment.
DATE: 03-29-2013   HOTFIX VERSION: 006
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
625821  CONCEPT_HDL    CORE             publishpdf  from command line doen not work  if temp directory does not exist.
642837  PSPICE         SIMULATOR        Option to disable Bias Points when Primary Analysis in Active Simulation Profile is DC Sweep
650578  ALLEGRO_EDITOR SHAPE            Allegro should do void only selected Shape without "Update Shape".
653835  ALLEGRO_EDITOR MANUFACT         Double character drill code overlaps with "cross" in NC drill legend
687170  SIP_LAYOUT     DRC_CONSTRAINTS  Shape to Route Keepout spacing DRC display incorrect
787041  FSP            DE-HDL_SCHEMATIC FSP Refdes inconsistency when gen schematics
825813  CONCEPT_HDL    CORE             HDL crashes when copying a property from one H block to other
834211  ALLEGRO_EDITOR SHAPE            Constant tweaking of shape oversize values is time consuming
835944  ALLEGRO_EDITOR OTHER            Customer want to change for Jumper symbol by other Alt symbol.
868981  SCM            SETUP            SCM responds slow when trying to browse signal integrity
871899  CONCEPT_HDL    CORE             'Multiple:' column of Grid window in DE-HDL option is too wide
873917  CONCEPT_HDL    CORE             Markers dialog is not refreshed
887887  CONCEPT_HDL    CORE             Option to find unconnected Pins/Nets with DEHDL L License
888290  APD            DIE_GENERATOR    Die Generation Improvement
892857  CONCEPT_HDL    CORE             packager treats R? as a unique reference designator
902908  PSPICE         SIMULATOR        Support of CSHUNT Option in Pspice
908254  ALLEGRO_EDITOR INTERACTIV       Enhancement request for DRC marker to have a link to CM
922422  CAPTURE        NETLIST_ALLEGRO  Netlist errors when using mix of convert and normal symbols
923361  ALLEGRO_EDITOR INTERACTIV       Stop writting PATH variables in env file if no modifications are done using User Preferences
935155  CAPTURE        DRC              No any warning messages listed in the On line DRC window even executed "Check & Save" to on line DRC
945393  FSP            OTHER            group contigous pin support enhancement
969342  ALLEGRO_EDITOR DATABASE         Enhanced password security for Allegro database
1005078 CAPTURE        ANNOTATE         Copy paste operation does not fill the missing refdes
1005812 F2B            BOM              bomhdl fails on bigger SCM Projects
1010988 CAPTURE        OPTIONS          ENH: ADD ISO 8601 Date Time format to Capture
1011325 ALLEGRO_EDITOR PLACEMENT        Placement replication creates modules with duplicate names
1016640 ALLEGRO_EDITOR PLACEMENT        Error/Warning Message for not finding or unmatched mechanical symbol or fiducials or which are not on a net
1018756 CONCEPT_HDL    CONSTRAINT_MGR   Match Groups with Pin Pairs are not getting imported into the schematic CM during Import Physical
1032387 FSP            OTHER            Pointer to set Mapping file for project based library.
1032609 FSP            IMPORT_CONSTRAIN Import qsf into FSP fails with 燕LL PLL_3 does not exist in device instance�
1040678 ALLEGRO_EDITOR MANUFACT         Text spacing is inconsistant for top and bottom SM layer in xsection chart
1042025 APD            WIREBOND         Order placement of  power rings for power/ground rings generation with using Perform Auto Bonding
1045500 CONCEPT_HDL    CORE             Why Search results does not display the correct Physical Pages.
1047259 CIS            EXPLORER         Sorting in CIS Explorer is not Numeric even for columns which are of Numeric data type
1047756 CAPTURE        NETLISTS         Not adding user defined properties in netlist generated by orDump.dll
1052455 RF_PCB         DISCRETE_LIBX_2A RFPCB IFF Export to fix port direction for ADS for footprint having the same pin rotation
1054314 CONCEPT_HDL    CORE             Zoom of custom text is different from other schematic objects
1061529 CONCEPT_HDL    CORE             Space can be included in LOCATION value and cannot be checked by checkplus
1064035 CONCEPT_HDL    COMP_BROWSER     Component Browser crashes on part number search using a library containing >23K parts
1064604 ALLEGRO_EDITOR MANUFACT         Enh - Include ability to add slot notes to designs
1065636 CONCEPT_HDL    OTHER            Text not visible in published pdf
1065843 CIS            PART_MANAGER     time stamp on library from different time zones triggers part manager lib out of date warnings
1066701 ALLEGRO_EDITOR OTHER            Missing padstack warnings not in Symbol refresh log summary
1067283 SCM            PACKAGER         ALLOW_CONN_SWAP does not work for lower level schematic parts
1067400 CONCEPT_HDL    CORE             ERROR(SPCOCD-171): Port exists in symbol but not in the schematic
1068878 CONCEPT_HDL    CORE             Rotating symbol causes the pin name to be upside down
1069896 ALLEGRO_EDITOR EDIT_ETCH        Cline changes to arc when routing even when Line lock is set to Line 45
1070465 CONCEPT_HDL    CORE             Why does ConceptHDL crash on renaming a Port Signal
1071037 PSPICE         SIMULATOR        Provide option to disable Index Files Time Stamp Check
1072311 CONCEPT_HDL    OTHER            Schematics are incorrect after importing design.
1072691 CONCEPT_HDL    CORE             Customer has the crash from Run Script of DE-HDL 16.51 again(#3)
1072859 SIP_LAYOUT     DIE_EDITOR       padstack selection window crash from Die Editing: Component editing of Co-Design Die
1073354 CONCEPT_HDL    CORE             Bubble defined on symbol pin is not visible on the schematic
1073837 ALLEGRO_EDITOR GRAPHICS         Some objects disappear on ZoomIn ZoomOut
1074243 ALLEGRO_EDITOR GRAPHICS         Allegro WorldView window does not always refresh after dehighlight of objects
1074606 ALLEGRO_EDITOR INTERACTIV       Enh - Cosmetic change in Filter Option UI of Replace padstack to indicate multiple pin entry format
1074794 ALLEGRO_EDITOR REPORTS          add commonly reguested via reports to Allegro and ICP reports.  Via per net, via per layer per net
1075587 CONCEPT_HDL    PAGE_MGMT        Unable to insert page in schematic
1076117 PSPICE         PROBE            Copy & Paste text/label in probe window changes font size and later gets invisible
1076145 SIP_LAYOUT     DIE_ABSTRACT_IF  Issue message in Add Codesign and Refresh Die Abstract if Pin Numbers from Die Abstract exceed 31 chars.
1076566 ALLEGRO_EDITOR EDIT_ETCH        Sliding diff pair cline that has a min/max prop rule displays the HUD meter inconsistently.
1076604 ALLEGRO_EDITOR SHAPE            Sliding via in pad corrupts surrounding shape and generates false DRC Errors
1076820 SPECCTRA       FANOUT           Fanout fails to stack vias in bga pads.
1076868 ALLEGRO_EDITOR PARTITION        Symbols become 'read only' inside a design partition
1076879 GRE            IFP_INTERACTIVE  Plan Column should not be present in Visibility tab for Symbol Editor
1076898 CONCEPT_HDL    CORE             User can not increase logic grid size value continuously using Up button on Design Entry HDL Options
1077026 CIS            LINK_DATABASE_PA fonts changes while linking db part in 16.5
1077187 ALLEGRO_EDITOR DATABASE         DBDoctor appears to fix database but nothing is listed in the log file.
1077527 CONCEPT_HDL    CORE             ConceptHDL net with name U cannot be found using Global navigate
1077621 CONCEPT_HDL    CORE             DEHDL crashes when saving page 3
1078270 SCM            UI               Physical net is not unique or not valid
1079616 CONSTRAINT_MGR CONCEPT_HDL      Packager error in 16.5 which is resolved when system is re-booted
1079821 CONCEPT_HDL    CORE             Project Setup does not respect $TEMP variable for temp_dir and creates a  directory in project calle
1080142 CIS            CONFIGURATION    peated entries in Allowed Part Ref Prefs
1080207 ALLEGRO_EDITOR INTERACTIV       Separate the 2  types of SOV violations."Segments over voids & Segments with missing plane coverage"
1080261 PSPICE         SIMULATOR        Encryption support for lines longer than 125 characters
1080336 CONCEPT_HDL    CORE             Backannotation error message ehnancement
1081001 ALLEGRO_EDITOR PLACEMENT        Package boundary is not visible while manually placing a component when using OrCAD license
1081237 ALLEGRO_EDITOR PLACEMENT        Place replicate > apply does not apply component pin properties stored in .mdd
1081284 MODEL_INTEGRIT TRANSLATION      Space in the file path will create a bogus error
1081346 ALLEGRO_EDITOR INTERACTIV       With Place manual, rotation of the symbol is not updated.
1081760 FSP            CONFIG_SETTINGS  Content of 澹PGA Input/Output Onchip termination� columns resets after update csv command
1082220 FLOWS          OTHER            Error SPCOCV-353
1082492 ALLEGRO_EDITOR PLACEMENT        Place replicate create does not highlight symbols.
1082676 ALLEGRO_EDITOR EDIT_ETCH        HUD meter doesnot display while sliding / add command
1082737 CAPTURE        GENERAL          The 澤rea select� icon shows wrong icon in Capture canvas.
1082739 CAPTURE        OTHER            The product choices dialogue box shows incorrect name
1082785 CONCEPT_HDL    CORE             DE HDL should clean the design with non sync properties in some automated way
1083761 CONCEPT_HDL    OTHER            AGND text missing from PDF Publisher
1083964 CONCEPT_HDL    OTHER            Do not display Value and other attributes on variant parts which are DNI
1084023 PSPICE         MODELEDITOR      Model Editor is slow/unresponsive while opening a Model by double-clicking on .lib file
1084178 ALLEGRO_EDITOR SHAPE            Spike create on dynamic void.
1084637 ALLEGRO_EDITOR INTERACTIV       Enhancement: Pick dialog should automatically be set to enter coordinates
1085010 CONCEPT_HDL    CREFER           Crefer crashes if the property value in the dcf file has more than 255 characters
1085347 CAPTURE        SCHEMATIC_EDITOR Replace cache results is loss of net graphic changes.
1085522 ALLEGRO_EDITOR INTERACTIV       Allegro add angle to Display->Measure results
1085791 CONCEPT_HDL    CORE             Publish PDF can not output Constraint Manager properties into PDF file.
1085891 ALLEGRO_EDITOR INTERACTIV       about DRC update
1085990 CAPTURE        DRC              B1: "ERROR(ORCAP-2207) Check Bus Width Mismatch" should be INFO
1086514 CONCEPT_HDL    COMP_BROWSER     Component Browser placement restrictions not working
1086576 CONCEPT_HDL    CHECKPLUS        CheckPlus hangs when running Graphic rules.
1086671 PSPICE         SIMULATOR        SPB16.6 pspice crashes with attached design
1086749 ALLEGRO_EDITOR MENTOR           mbs2brd: DEFAULT_NET_TYPE rule is not translated
1086886 CAPTURE        PROPERTY_EDITOR  "Is No Connect" check box in property editor doesn't work for power pins
1086902 CONCEPT_HDL    INFRA            Problems occurred while loading design connectivity
1086937 PSPICE         ENVIRONMENT      PSpice Color map getting doubled leading to crash after colors are modified number of times.
1087221 CONCEPT_HDL    OTHER            Part manager could not update any parts.
1087223 CAPTURE        CROSSREF         Cross Probing issue when login into system with user name containing white space
1087295 SIP_LAYOUT     EXPORT_DATA      Enable "Package Overlay File for IC" for concurrent co-design dies too
1087658 CAPTURE        PRINT/PLOT/OUTPU Lower level design pages are getting print twice
1088231 F2B            PACKAGERXL       Design fails to package in 16.5
1088252 CONCEPT_HDL    CORE             Menu commands grayed out after Save (with 16.5-s035) when launched from ASA.
1088606 ALLEGRO_EDITOR INTERACTIV       Pin Number field do not support Pin Range for Symbol Editor
1088983 CONSTRAINT_MGR CONCEPT_HDL      Units resolution changed in 16.6 Constraint Manager
1089017 ALLEGRO_EDITOR SHAPE            What is the cause of the shape not filling?
1089259 SCM            IMPORTS          Cannot import block into ASA design
1089356 SIP_LAYOUT     DIE_EDITOR       Distributed co-design : launching die editor taking more than an hour to bring up edit form
1089362 PSPICE         STABILITY        Pspice crash on pspice > view simulation result on attached project
1089368 SCM            OTHER            Can't do Save - cp: cannot stat ... No such file or directory
1089605 CONCEPT_HDL    CONSTRAINT_MGR   Power net missing from the CM opened from DEHDL Schematic editor.
1090068 ALLEGRO_EDITOR SHAPE            shape priority issue in SPB165
1090125 ALLEGRO_EDITOR DATABASE         Q- The rename resequence log file is not giving correct message.
1090181 GRE            CORE             AiDT fails for the nets with errors SPGRE-21 & SPGRE-22
1090930 CONSTRAINT_MGR CONCEPT_HDL      DEHDL-CM does not retain customized worksheet.
1091335 CONCEPT_HDL    OTHER            Color change cannot remain in some situation.
1091347 CAPTURE        TCL_INTERFACE    The Project New link on Start Page doesn't work when Journaling is enabled
1091359 CAPTURE        GENERAL          Toolbar Customization missing description
1091662 CONCEPT_HDL    CORE             Incorrect behavior with the SHOW_PNN_SIGNAME directive
1091714 CAPTURE        PART_EDITOR      More than one icons gets selected in part editor at the same time
1092411 CONSTRAINT_MGR INTERACTIV       In v16.6 CM multiple net name selection under net column is not working as in v16.5
1092426 CONCEPT_HDL    CORE             Getting ERROR(SPCOCN-1993) while saving a Hierarchical Design
1092874 CONCEPT_HDL    CORE             DEHDL wire short during move not detected with check enabled
1092882 ALLEGRO_EDITOR EDIT_ETCH        AICC should be removed from orcad PCB Designers design parameters
1092918 CAPTURE        GENERATE_PART    Generate part functionality gives no/misleading information in sesison log in case of error
1092933 CONCEPT_HDL    OTHER            PDF Publisher saves the pdf generated in the previous project folder
1093327 CONCEPT_HDL    OTHER            Getting error SPCODD � 369 Unable to load physical part in variant editor
1093391 CONSTRAINT_MGR OTHER            Setup > Constraints > (domain), doesn't open correct worksheet with OrCAD PCB Editor Professional license.
1093886 SPECCTRA       HIGHSPEED        Pin delay does not work in PCB Router when specified in time
1094223 CAPTURE        PROPERTY_EDITOR  CTRL+S does not work in Property Editor but RMB > Save.
1094513 CONCEPT_HDL    CORE             How to display $PNN for which SIG_NAME is not visible?
1094611 CAPTURE        PROPERTY_EDITOR  E1: 'Tools->Update Properties' should list parts which are present in .UPD, but not schematic
1094618 CONCEPT_HDL    INFRA            Unable to uprev the design in 16.5
1094867 CONCEPT_HDL    CORE             Page Up / Down Keys are hard-coded assigned to Next /Previous Sheet
1095449 SIP_LAYOUT     LOGIC            Allow netlist-in wizard to work on a co-design die
1095701 CONCEPT_HDL    CORE             Replace part in replicated block only preserves the Refdes in 1st instance of the replicated block
1095705 CONCEPT_HDL    CREFER           Cref_to_list not updated on repl icated blocks in 16.5 release worked fine in 16.3
1095861 F2B            BOM              Using Upper-case Input produces incorrect BOM results
1096318 ALLEGRO_EDITOR INTERFACES       IDF import not removing MCAD tagged objects during import
1097241 CONCEPT_HDL    CORE             Concepthdl - zoom in to first object in Find result automatically
1097468 ALLEGRO_EDITOR INTERACTIV       Need ability to hilight and assign color to vias
1097675 CAPTURE        ANNOTATE         Enhancement:Option to have Incremental reference Update to be checked at all times when we click on Tool>Annotate
1099151 SIG_INTEGRITY  SIMULATION       All Neighbor crosstalk numbers reported when there are no aggressors
1099175 CONCEPT_HDL    CORE             CPM directive that enables the Command Console Window in DE-HDL
1099838 CAPTURE        TCL_INTERFACE    TCL library correction utility is not working correctly.
1099903 ALLEGRO_EDITOR PLACEMENT        Mirror and rotating component places component mirror side
1099941 ALLEGRO_EDITOR PLACEMENT        Problem in rotating bottom components when using Place Manual or place manual -h command
1099998 CONCEPT_HDL    CHECKPLUS        CheckPlus marker file not locating signal when signal name includes the # character.
1100018 CONCEPT_HDL    COPY_PROJECT     CopyProject gives errors about locked directives
1100449 ALLEGRO_EDITOR ARTWORK          Pad with Net_short property and shorted to shape supressed wrongly with Pad Supression in Artwork
1100758 CAPTURE        LIBRARY          Import properties does not update pin numbers of multi section parts
1101009 CONCEPT_HDL    CORE             Cursor stays as arrow after performing File > Save Hierarchy
1101497 ALLEGRO_EDITOR UI_FORMS         Allegro PCB Editor crashes using attached script when working with RF PCB Clearances.
1101813 SIP_LAYOUT     DIE_ABSTRACT_IF  Support die abstract properties
1102531 ALLEGRO_EDITOR GRAPHICS         Allegro graphics distortion infinite cursor 16.6
1102623 ALLEGRO_EDITOR SHAPE            Strange void around the pad
1103246 FSP            FPGA_SUPPORT     New FPGA request - Arria V - 5AGXMA1D6F31 - IN2P3
1103631 MODEL_INTEGRIT OTHER            Model Integrity license when using orcad
1103703 F2B            DESIGNSYNC       Toolcrash with Design Differences
1103712 CONCEPT_HDL    COPY_PROJECT     Copy Project crashes on customer design attempting to update symbol view
1104068 CAPTURE        DRC              "Check single node connection" DRC gets reset in 16.6
1104121 PSPICE         AA_OPT           燕arameter Selection� window not showing all the components : on WinXP
1104575 CONCEPT_HDL    CORE             Allign does not allign offgrid symbols correctly
1104727 CONSTRAINT_MGR SCM              Net Group created in sip does not transfer to SCM
1105128 CONSTRAINT_MGR DATABASE         Import dcf does not clear out user defined schedule.
1105195 SIP_LAYOUT     WIREBOND         Request that Tack points default to a "fixed" position after Generate Bond Wires.
1105249 ALLEGRO_EDITOR OTHER            PDF out--- component user defined prop doesn't list the prop selection form
1105443 PSPICE         AA_OPT           Parameter selection window in optimizer  does not list param part
1105818 ALLEGRO_EDITOR INTERACTIV       Menu-items seperators are clickable and menu goes away when clicked
1105822 ALLEGRO_EDITOR SCHEM_FTB        Netrev failing with compact pin syntax
1105993 SIP_LAYOUT     LOGIC            Import netlist no longer works with co-design die in SiP 16.6
1106332 SIP_LAYOUT     OTHER            sprintf for axlSpreadsheetDefineCell writes characters in upper case only
1106786 CAPTURE        SCHEMATICS       Bug: Pointer snap to grid
1107132 FSP            OTHER            Altera ArriaV (5AGXMA5GF31C4) support.
1107151 ALLEGRO_EDITOR ARTWORK          Shape filling removed when changing artwork format to RS274X in Global Dynamic Param
1107237 SIP_LAYOUT     WIZARDS          Updating a Die using the Die Text In Wizard will error out and not finish
1107371 ADW            COMPONENT_BROWSE ADW preset Warning filter is spelt incorrectly. (Wraning).
1107599 CAPTURE        STABILITY        Capture 16.6 crash when trying to invoke
1108118 ALLEGRO_EDITOR OTHER            PDF Publisher pad rotation messed up with flashed pad.
1108574 ADW            COMPONENT_BROWSE LifecycleStatus functionality does not work when in Metadata mode. Work correctly in PPT Mode
1109095 SIP_LAYOUT     WIREBOND         Bondfinger move in hug mode create drcs
1109113 ALLEGRO_EDITOR DATABASE         Allegro Netrev crash with SPB 16.6
1109622 SIP_LAYOUT     DATABASE         In a wirebond design, the ratsnests with 'Closest Endpoint' should not point to the die pins.
1110077 ALLEGRO_EDITOR DRC_CONSTR       Duplicate Drill Hole DRC's are not shown for Pins overlapped in same symbol unless "Min metal to metal" DRC is turned ON
1110256 ALLEGRO_EDITOR SHAPE            Auto void on dynamic shape is not correct in 16.6
1110264 RF_PCB         FE_IFF_IMPORT    IFF Import in DEHDL has component offset
1111226 ALLEGRO_EDITOR DATABASE         Name too long error with Uprev command when output file name exceeds 31 characters
1111234 ALLEGRO_EDITOR MANUFACT         Double digit drill character overlaps with figures triangle, hexagon and octagon in NC drill legend
1112431 SIP_LAYOUT     COLOR            Frequent crash while working with latest version of CDNSIP
1112493 ALLEGRO_EDITOR DATABASE         Customer does not like 16.6 Ratsnest points Closest Endpoint
1112774 GRE            CORE             Allegro GRE not able to commit plan after topological plan
1113908 ALLEGRO_EDITOR COLOR            Dehilight command fails to remove highlight pattern on a cline, without removing net custom color.
1114815 ALLEGRO_EDITOR OTHER            Q1: Switchversion error when reading -fa file
1114994 ALLEGRO_EDITOR DATABASE         Getting an error after upreving components to 16.6
DATE: 03-7-2013    HOTFIX VERSION: 005
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1067770 IXCOM-COMPILE  COVERAGE         Assertion failed: file ../covToggleCoverageXform.cpp, line 1102
1100442 ALLEGRO_EDITOR PLACEMENT        Placement queue shows components whichs are already placed
1101555 ALLEGRO_EDITOR DATABASE         Allegro Crash frequently
1104011 ALLEGRO_EDITOR DATABASE         Place replicate move group of a modules leaves traces behind
1104065 SCM            NETLISTER        SCM 16.6 has problem generating Verilog with existing sym_1 view
1104605 F2B            PACKAGERXL       Pins of function swapped part in block not displayed
1104790 SCM            IMPORTS          Corrupt data once SiP file is imported into SCM
1105066 APD            IMPORT_DATA      Import NA2 worked in 16.5 "035" but fails in 037 and 16.6
1106323 ALLEGRO_EDITOR PLACEMENT        Unable to locate specific placed symbol on this board as it becomes invisible after placement.
1108032 CONCEPT_HDL    CORE             'Find' option does not list all Components in the Design
1109080 ALLEGRO_EDITOR OTHER            Window DRC is not working in OrCAD PCB Editor Professional
DATE: 02-22-2013   HOTFIX VERSION: 004
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1081026 ALLEGRO_EDITOR GRAPHICS         3D Viewer do not show the height for the embedded component correctly
1095225 ALLEGRO_EDITOR EDIT_ETCH        The Constraint option does not work from right mouse click>Options>Line Width > constraint during interactive routing
1096356 ALLEGRO_EDITOR DATABASE         Cannot Analyze a Matched Group in CM
1097481 ALLEGRO_EDITOR INTERACTIV       Allow replace padstack command in design partition
1098252 ALLEGRO_EDITOR MANUFACT         Double digit drill character overlaps with figure "circle" in NC drill legend
1099958 ALLEGRO_EDITOR PAD_EDITOR       Library Drill Report producing an empty report
1100401 ALLEGRO_EDITOR OTHER            Invalid switch message for "m" for a2dxf command
1101026 ALLEGRO_EDITOR OTHER            utl_perftune hanging in fpoly_RemoveVerySmallSegments(), causing shape degassing never to exit.
1101064 SIP_LAYOUT     SHAPE            'Shape force update creates a rat
1102798 SIP_LAYOUT     OTHER            Stream out puts offset pad in wrong position if pad is mirrored but not rotated.
DATE: 02-8-2013    HOTFIX VERSION: 003
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1077728 APD            EXTRACT          Extracta.exe generate the incorrect result
1084711 APD            DXF_IF           Padstacks with offsets cause violations in Export > DXF
1090369 SIG_INTEGRITY  LICENSING        Impedance value not updating in OrCAD PCB Designer
1093050 ALLEGRO_EDITOR DRC_CONSTR       Taper trace on diff pairs not checking to min line spacing.
1093563 SPECCTRA       ROUTE            PCB Router crashes with reduce_padstack set to on
1093717 APD            DATABASE         Design is crashing in Tools > Update DRC and in Dbcheck but seems inconsistent
1094788 SIP_LAYOUT     WIREBOND         Wirebond edit move command
1095786 ALLEGRO_EDITOR DRC_TIMING_CHK   Allegro PCB crashes when running DBDoctor
1096234 ALLEGRO_EDITOR DFA              Via pad connected to shape didn篙 show up after 燙uppress unconnected pads� option.
1096313 RF_PCB         LIB_TRANSLATOR   Allegro Discrete Library to Agilent ADS Translator offsets in the CDNSsymbo.iff
1096613 ALLEGRO_EDITOR INTERACTIV       Enh-While moving parts silk ref des should remain visible
1096676 CONCEPT_HDL    CORE             SPB 16.5 HF36 breaks designs that workded fine in HF35
1096913 APD            IMPORT_DATA      Import > NA2 fails to bring in the Y1 component.
1097751 ALLEGRO_EDITOR DATABASE         Import CIS netlist crashes.
1097889 ALLEGRO_EDITOR DRC_TIMING_CHK   Allegro crashes when routing from a via to a pin using High Speed option license.
DATE: 1-25-2013    HOTFIX VERSION: 002
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
491042  CONCEPT_HDL    SECTION          Prevent PackagerXL from changing visibility on SEC attribute
863928  ALLEGRO_EDITOR INTERACTIV       Segment over void higlights false "nets with arc"
1067272 PCB_LIBRARIAN  CORE             Unable to retain the symbol outline changes
1074820 ALLEGRO_EDITOR GRAPHICS         losing infinite cursor tracking after selecting the add text command with opengl enable
1075622 CONCEPT_HDL    CORE             PDV Edit Symbol in DE-HDL all editing functions disabled since Hotfix 33
1076986 APD            WIREBOND         Wirebond Adjust Min DRC does not maintain the finger position in the same sequence
1078031 SIG_INTEGRITY  REPORTS          Requesting improvement to progress indicator for report generator
1080213 SIP_LAYOUT     WIREBOND         Wrong behavior of Redistribute Fingers Command
1080667 ALLEGRO_EDITOR GRAPHICS         Allegro lines with fonts not displayed correctly in 16.6
1080982 CONCEPT_HDL    CORE             Crash of Allegro Design Entry during a copy of a note.
1081200 CONSTRAINT_MGR OTHER            In the DIFF_PAIR worksheets various Analysis seem to take a long time to complete.
1081553 CONCEPT_HDL    OTHER            Model Assignment can not translate M (Milli-ohm) property value of DE HDL.
1081696 ALLEGRO_EDITOR INTERACTIV       Compose shape not working when radius is set to 1.0
1082595 ALLEGRO_EDITOR COLOR            Infinite cursor remains white even we change background to white
1082704 ALLEGRO_EDITOR GRAPHICS         infinite cursor disappears when using Display>Measure
1082715 SIG_EXPLORER   INTERACTIV       Single line impedance for BOTTOM Layer is not calculated in cross section upon changing the thickness of dielectic layer
1082774 ALLEGRO_EDITOR TECHFILE         Import techfile command terminates abnormally when importing a generic techfile.
1082820 CONSTRAINT_MGR UI_FORMS         The configure generic cross-section pull downs do not work.
1083133 SIP_LAYOUT     INTERACTIVE      SiP will crash when using the beta Pad Rename command to change a BGA pads name.
1083158 ALLEGRO_EDITOR GRAPHICS         The cursor chage to Arrow head for Shape Select is more sensitive to location in SPB 16.6
1083533 CONCEPT_HDL    CONSTRAINT_MGR   Bug -Net-count under few of the netclasses are not in sync between Schematics & Layout
1083637 PCB_LIBRARIAN  CORE             Save As is not renaming the NAME in the symbol.css file
1083934 ALLEGRO_EDITOR PAD_EDITOR       Error(SPMHUT-41): File selected is not of type Drawing.
1084148 CONCEPT_HDL    CHECKPLUS        The CheckPlus hasProperty predicate fails in the Physical environment.
1084166 SIP_LAYOUT     DIE_ABSTRACT_IF  Updating sip layout with new die abstract doesn't properly update IC_DESIGN_CELL* properties
1084285 CONCEPT_HDL    INFRA            Corrupted dcf was never fixed and caused PXL error
1084441 CONCEPT_HDL    CORE             Assigned net property value changes to numeric
1084542 ALLEGRO_EDITOR DRAFTING         Dimensions associated with frect doesn't rotate with the symbol.
1084736 APD            IMPORT_DATA      Import SPD2 file from UPD-L shape Pad and text issue
1085008 ALLEGRO_EDITOR INTERACTIV       Relative (from last pick) option in the Pick dialog not working for pick command
1085139 ALLEGRO_EDITOR GRAPHICS         Infinite Cursor disappear during Add Connect if Infinite_cursor_bug_nt is enabled
1085187 SIP_LAYOUT     INTERFACE_PLANNE netrev with overwrite constraints fatal error
1086402 ALLEGRO_EDITOR GRAPHICS         Infinite cursor dissapear when using command like add connect or Place manually with opengl enabled.
1086905 PSPICE         SIMULATOR        PSpice crash while simulating circuit file with BREAK function
1087770 ALLEGRO_EDITOR EDIT_ETCH        Allegro crashes on a pick with the slide command.
1088412 SCM            CONCEPT_IMPORT   why reimport block adds _1 to the netnames?
1088958 CONSTRAINT_MGR INTERACTIV       annot create Differential Pairs out of nets that belongs to a Net Group
1089336 ALLEGRO_EDITOR GRAPHICS         infinite cursor and pcb_cursor_angle
1090689 ADW            LRM              LRM: Unable to select any Row regardless of Status
1090955 ALLEGRO_EDITOR OTHER            Cancel command crashes PCB Editor when add rectangle
1091047 ALLEGRO_EDITOR REPORTS          The "Dangling Lines Via and Antenna� report seems to be missing vias that are antennas.
1091218 ADW            LRM              LRM is not worked for the block design of included project
1091443 ALLEGRO_EDITOR OTHER            Crash when toggling suppress pads
1091706 ALLEGRO_EDITOR EDIT_ETCH        Allegro crash while routing after setting variable acon_no_impedance_width
1092916 CAPTURE        OTHER            Capture crash
1093573 ALLEGRO_EDITOR DATABASE         team design opening workflow manager crashes allegro.  possibly corrupt database
DATE: 12-18-2012   HOTFIX VERSION: 001
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
501079  ALLEGRO_EDITOR MODULES          Enhancement for Module swap function similar to component swap
745682  CONCEPT_HDL    CORE             Attributes window requires resizing each time DEHDL is launched
825846  CONCEPT_HDL    CORE             The module_order.dat file gets corrupted
871886  CONCEPT_HDL    CORE             Browse button in Signal Integrity window of DE-HDL option causes program crash
891439  ALLEGRO_EDITOR INTERACTIV       moving cline segments
898029  CAPTURE        PRINT/PLOT/OUTPU ENH: TCL:To show net alias clearly in print out if alias has underscore
923210  CONCEPT_HDL    CORE             Search with multiple properties does not show all properties
938977  CONCEPT_HDL    CORE             Properties attached to standard/DRAWING symbol does not propagate to parts placed in the schematic
947451  ALLEGRO_EDITOR INTERACTIV       Allow the tool to select multiple shapes when assigning a net to more than one shape.
968646  ALLEGRO_EDITOR EDIT_ETCH        The Cline to Pad spacing not followed for Multidrill pad it is more then minimum spacing
976723  ADW            MODEL_MANAGEMENT SI DML Model has to be provided the Auto Generate function for discrete components on DBeditor
981767  SCM            UI               Add series termination in ASA will crash if both output and input pins are selected.
982273  SCM            OTHER            Package radio button is grayed out
988438  CONCEPT_HDL    CORE             Visible constraint disrupts MOVE command
989471  ALLEGRO_EDITOR INTERACTIV       Functionality to zoom to the selected object in Pre Select Mode
993562  CONCEPT_HDL    INFRA            After upreving the design save hierarchy is leading to WARNING(SPCOCD-34).
996577  SPECCTRA       ROUTE            Specctra not routing NET_SHORT connections
997992  CONCEPT_HDL    CORE             Why are Page Numbers not enumerated correctly when multiple TOC Symbols are used?
1001300 PSPICE         MODELEDITOR      BUG: Simserver crash with encryptedm model
1010124 PSPICE         SIMULATOR        Monte Carlo summary doesn't list all the runs in case of Convergence error in one of the runs
1013656 SCM            OTHER            create diff-pair should honour diff-pair setup or ask user for positive negative leg
1013721 ALLEGRO_EDITOR EDIT_ETCH        Routing near a 2x3 multi drill padstack does not maintain the spacing constraints.
1016859 SCM            REPORTS          dsreportgen exits with %errorlevel%
1018506 ALLEGRO_EDITOR INTERACTIV       Edit copy with retain net of via will assign net to pin
1020746 CONCEPT_HDL    OTHER            PDF Publisher tool behavior inconsistent between OSs
1020798 SIP_LAYOUT     SHAPE            Shape not voiding on layer 2 causing shorts
1023051 SCM            UI               Wrong and incorrect message is generated while adding connectivity in SCM matrix view � DSTABLE-140
1023774 APD            WIREBOND         After "xml wire profile data" is imp