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allegro 16.6导网表错误

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之前用16.6导过网表的orCAD原理图,后面用16.6重新导网表不知道怎么回事出现下面好多警告,错误。不知道怎么回事,求帮助解决。
Spawning... "C:\Cadence\SPB_16.6\tools\capture\pstswp.exe" -pst -d "F:\WORK\PT_JOB\21_IC\SH_STEVEN\POA030\FH8510_+_POA030_PCB_V02_1205\FH8510_+_POA030_PCB_V02_1205\FH8510 + POA030_V02_1205.DSN" -n
"F:\WORK\PT_JOB\21_IC\SH_STEVEN\POA030\FH8510_+_POA030_PCB_V02_1205\FH8510_+_POA030_PCB_V02_1205\ALLEGRO_NET" -c "C:\Cadence\SPB_16.6\tools/capture/allegro.cfg" -v 3   -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
#1 WARNING(ORCAP-36006): Part Name "4 HEADER_0_2PIN-1_25MM_2PIN-1_25MM" is renamed to "4 HEADER_0_2PIN-1_25MM_2PIN-1_2".
#2 WARNING(ORCAP-36006): Part Name "4 HEADER_1_3PIN-1_5MM_3PIN-1_5MM" is renamed to "4 HEADER_1_3PIN-1_5MM_3PIN-1_5M".
#3 WARNING(ORCAP-36006): Part Name "CMOS SENSOR OV9710-LEN_0_LENS_LENS" is renamed to "CMOS SENSOR OV9710-LEN_0_LENS_L".
#4 WARNING(ORCAP-36006): Part Name "CMOS SENSOR OV9710-VL1A_27_CLCC40_POA030" is renamed to "CMOS SENSOR OV9710-VL1A_27_CLCC".
#5 WARNING(ORCAP-36042): Pin "GND" is renamed to "GND#3" as visible power pin of same name already exists in Package CS4334_0 , U6: SCHEMATIC1, FH8510+POA030 (142.24, 251.46).
#6 WARNING(ORCAP-36042): Pin "GND" is renamed to "GND#7" as visible power pin of same name already exists in Package CS4334_0 , U6: SCHEMATIC1, FH8510+POA030 (142.24, 251.46).
#7 WARNING(ORCAP-36006): Part Name "XTAL HC49LP 27MHZ / MK2743_1_XTAL_UP_6.0MHZ" is renamed to "XTAL HC49LP 27MHZ / MK2743_1_XT".
INFO(ORCAP-36080): Scanning netlist files ...

WARNING(ORCAP-36006) 警告,在论坛上或在其它地方没有谁说到解决办法,本人也一直没有找到办法解决!寄望。

我现在也有这样的问题,请问你之后是怎么解决的?

pin脚名称太长,系统自动给修改了而已,只是知会你一下,没必要处理

系统导网表时会有个默认的字符长度(31)限制,这个一般没有影响,如果实在想去掉,可按照如下图所示修改一下限制大小,


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