- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
紧急求助:关于allegro导入capture的网表,谢谢!
allegro导入capture的网表,总是出现如下问题,是什么问题呀?
Cadence Design Systems, Inc. netrev 15.2 Thu Dec 01 15:21:20 2005
(C) Copyright 2002 Cadence Design Systems, Inc.
------ Directives ------
RIPUP_ETCH FALSE;
RIPUP_SYMBOLS ALWAYS;
MISSING SYMBOL AS ERROR FALSE;
SCHEMATIC_DIRECTORY '.';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'E:×.brd';
NEW_BOARD_NAME 'E:\×.brd';
CmdLine: netrev -$ -5 -i . -u -y 1 E:\dd\#Taaaaaa03524.tmp
------ Preparing to read pst files ------
#1 ERROR(24) File not found
Packager files not found
#2 ERROR(102) Run stopped because errors were detected
netrev run on Dec 1 15:21:20 2005
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
2 errors detected
No oversight detected
No warning detected
cpu time 0:00:12
elapsed time 0:00:00
查了论坛里面所有的关于导入网表的资料,还是没有找到答案,郁闷呀!
Packager files not found
找不到库的路径
由Capture导入网表到Allegro之前,所有元件的{PCB Footprint}属性都必须设置为正确的Allegro能够识别的封装名称(包括Allegro自带封装库和用户自定义封装库)。
检查一下你的网表输入目录,可能是目录没有填对
应该是元件库的路径没设置好,
在Setup=user preferences=design path=psm paths设置库的路径试试。
niu!
谢谢,成功了,呵呵,可能是网表目录的问题。