cadence concept HDL为什么不能打包成功

大家好！

　　　　　我是刚学cadence这个软件，以是都是用protel 99，现在刚做了一个简单的原理图；用cadence concept HDL画的；为什么不能打包成功?

以下是错误的提示，请高手指点一下我错在哪里?

    Cadence Design Systems, Inc.
    Packager-XL 15.20-p001 WIN32 28-May-2004 12:00:00 IST
    (C) Copyright 1994, Cadence Design Systems, Inc.

    Run on Tue Jun 19 23:07:45 2007

 **********************************************
 *  Processing project file and command line  *
 **********************************************

    ANNOTATE  'BODY' 'PIN'
    COMP_DEF_PROP  'ALT_SYMBOLS' 'JEDEC_TYPE' 'NC_PINS' 'MERGE_NC_PINS'
                   'POWER_GROUP' 'POWER_PINS' 'MERGE_POWER_PINS' 'PINCOUNT'
    COMP_INST_PROP  'GROUP' 'ROOM' 'REUSE_INSTANCE' 'REUSE_ID' 'REUSE_NAME'
                    'SIGNAL_MODEL' 'DEFAULT_SIGNAL_MODEL'
                    'VOLT_TEMP_SIGNAL_MODEL'
    SUPPRESS_GLOBAL_SHORT_CHECK OFF
    DEBUG    0
    DEFAULT_PHYS_DES_PREFIX U
    FEEDBACK  'OFF'
    MAX_ERRORS 999
    NET_NAME_CHARS   @  -  ！  #  %  &  (  )  *  .  /  :  ?  [  ]  ^  _  `  +
                     =  >  0  1  2  3  4  5  6  7  8  9
    NET_NAME_LENGTH 31
    NUM_OLD_VERSIONS 3
    OPTIMIZE OFF
    REUSE_REFDES ON
    OPF_OPTIMIZATION OFF
    HARD_LOC_SEC OFF
    FORCE_PTF_ENTRY OFF
    REGENERATE_PHYSICAL_NET_NAME OFF
    SCH_POWER_GROUP_WINS_OVER_PPT OFF
    NULL_OPT_VALID OFF
    USE_VECTOR_NOTATION ON
    FILTER_ECS_FROM_XNET ON
    OUTPUT  'ON'
    PACKAGE_PROP  'GROUP' 'ROOM'
    PART_TYPE_LENGTH 31
    REF_DES_LENGTH 31
    REPACKAGE OFF
    ELECTRICAL_CONSTRAINTS OFF
    OVERWRITE_CONSTRAINTS OFF
    RUN_DIR ./worklib/tda7294/packaged/
    STRICT_PACKAGE_PROP  'REUSE_INSTANCE'
    USE_LIBRARY_PPT ON
    USE_STATE ON
    WARNINGS ON
    LIBRARY  'tda7294_lib' 'standard' 'element'
    VIEW_PTF part_table
    VIEW_PACKAGER packaged
    VIEW_CONSTRAINTS constraints
    DESIGN_LIBRARY tda7294_lib
    DESIGN_NAME tda7294
    VIEW_CONFIG_PHYSICAL cfg_package
    SD_SUFFIX_SEPARATOR _

 **************************************************************
 *  End processing project file and command line  (00:00:00)  *
 **************************************************************

Creating Configuration "cfg_package" for Design "tda7294"

Loading C:\Cadence\SPB_15.2\share\cdssetup\cdsprop.tmf.
Loading C:\Cadence\SPB_15.2\share\cdssetup\cdsprop.paf.

 *********************************
 *  Loading the design database  *
 *********************************

 #1  ERROR(346): Unable to expand this design for packaging.  The chips view w~
as not found for cell '\7294 ' in library 'tda7294_lib'.

1 errors detected
No warnings detected
    Start time   23:07:45
    End time     23:07:45
    Elapsed time  0:00:00

 **************************************************
 *  FATAL ERROR PackagerXL exiting with status 2  *
 **************************************************

高手请指点下,本人万分感谢！

解决思路：

1.cell"\7294"的命名对吗?

2.library 'tda7294_lib'的路径对吗? 

非常感谢zxpchx的提醒,你能否说详细一些啊！

库是光盘里面按装的,电阻;电容等无器件都是从里面调出来的.在这个原理图中我自已只做了一个4PIN的连接器.针对cadence concept HDL画原理图要怎样设置呢?

请指点..感动中........

在库里找不到这个器件！