- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
OrCAD网表导入Allegro时出现的问题!
如题:
出错报告为:
------ Oversights/Warnings/Errors ------
------ Library Paths ------
MODULEPATH = .
E:/Cadence16.0/Ftb_160/cdssite/pcb/modules
E:\AD Board\Symbol\
PSMPATH = .
symbols
..
../symbols
E:/Cadence16.0/Ftb_160/cdssite/pcb/symbols
e:/Cadence/SPB_16.0/share/pcb/pcb_lib/symbols
e:/Cadence/SPB_16.0/share/pcb/allegrolib/symbols
E:\AD Board\Symbol\
PADPATH = .
symbols
..
../symbols
E:/Cadence16.0/Ftb_160/cdssite/pcb/padstacks
e:/Cadence/SPB_16.0/share/pcb/pcb_lib/symbols
e:/Cadence/SPB_16.0/share/pcb/allegrolib/symbols
E:\AD Board\Symbol\
#1 ERROR(SPMHNI-235): Error detected saving design.
ERROR(SPMHNI-234): Cannot write drawing, '#Taaaaaa03596.tmp' out to the directory: 'Database has a non-recoverable corruption. Contact Cadence customer support.'.
#2 Run stopped because errors were detected
netrev run on Nov 13 9:56:20 2007
DESIGN NAME : 'AD1'
PACKAGING ON Sep 6 2007 19:01:51
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
2 errors detected
No oversight detected
No warning detected
之前导入网表成功了,可是在布局时我发现封装作的有些差错,于是就重新做的封装,也已经在CIS原理图中更新了,结果再次导入时就发生了这个问题,5555555555,不知道什么原因,希望大家帮帮小妹,在此先谢谢咯!
用备份文件再试试。