ORCAD to ALLEGRO ！急急急！

错误如下：

Cadence Design Systems, Inc. netrev 15.5 Sat Mar 15 10:36:53 2008
(C) Copyright 2002 Cadence Design Systems, Inc.

------ Directives ------

RIPUP_ETCH FALSE;
RIPUP_SYMBOLS ALWAYS;
MISSING SYMBOL AS ERROR FALSE;
SCHEMATIC_DIRECTORY '.';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'D:/allegro/design1.brd';
NEW_BOARD_NAME 'D:/allegro/design1.brd';

CmdLine: netrev -$ -5 -i . -y 1 D:/ALLEGRO/#Taaaaaa03032.tmp

------ Preparing to read pst files ------

Starting to read ./pstchip.dat
   Finished reading ./pstchip.dat (00:00:00.00)
Starting to read ./pstxprt.dat
   Finished reading ./pstxprt.dat (00:00:00.00)
Starting to read ./pstxnet.dat
   Finished reading ./pstxnet.dat (00:00:00.00)

------ Oversights/Warnings/Errors ------

#1   WARNING(304) Device/Symbol check warning detected.

Symbol 'SOT343R' for device 'BFS17/SOT_SOT343R_BFS17/SOT' has extra pin '4'.

#1   ERROR(305) Device/Symbol check error detected.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '14'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '13'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '3'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '12'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '4'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '11'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '5'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '10'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '6'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '9'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '7'.

Symbol 'R0603' for device 'RESISTOR 7PACK_R0603_301' is missing pin '8'.

------ Library Paths ------
MODULEPATH =  .
           D:/allegro-vcd/pcb/modules

PSMPATH =  .
           symbols
           ..
           ../symbols
           D:/allegro-vcd/pcb/symbols
           d:/Cadence/SPB_15.5/share/pcb/pcb_lib/symbols
           d:/Cadence/SPB_15.5/share/pcb/allegrolib/symbols
           D:\LIB155\SYMBOLS\

PADPATH =  .
           symbols
           ..
           ../symbols
           D:/allegro-vcd/pcb/padstacks
           d:/Cadence/SPB_15.5/share/pcb/pcb_lib/symbols
           d:/Cadence/SPB_15.5/share/pcb/allegrolib/symbols
           D:\LIB155\PAD\

------ Summary Statistics ------

#2   ERROR(102) Run stopped because errors were detected

netrev run on Mar 15 10:36:53 2008
   DESIGN NAME : 'DESIGN1'
   PACKAGING ON Jun 17 2005 00:56:10

   COMPILE 'logic'
   CHECK_PIN_NAMES OFF
   CROSS_REFERENCE OFF
   FEEDBACK OFF
   INCREMENTAL OFF
   INTERFACE_TYPE PHYSICAL
   MAX_ERRORS 500
   MERGE_MINIMUM 5
   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
   NET_NAME_LENGTH 24
   OVERSIGHTS ON
   REPLACE_CHECK OFF
   SINGLE_NODE_NETS ON
   SPLIT_MINIMUM 0
   SUPPRESS   20
   WARNINGS ON

  2 errors detected
 No oversight detected
  1 warnings detected

cpu time      0:00:14
elapsed time  0:00:00

新手，期望各位高手解答

先谢谢了，急啊

基本上都是線路圖和library對不上造成的錯誤

Warning為SOT343R這個零件和線路圖不同，線路圖的SOT343R少了第四腳

Error為14P7R排阻用到0603的library，改為14pin排阻的library

在做库的时候mapping错了，重新改一下，把元件管脚与footprint改成一样的

好东西