- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
求助,capture 16.2导网表时错误!
capture 16.2导网表时错误!
********************************************************************************
*
* Netlisting the design
*
********************************************************************************
Design Name:
e:\new_mcu\原理图\控制板\str912faw44.dsn
Netlist Directory:
E:\NEW_MCU\印制板\B0100
Configuration File:
D:\Cadence\SPB_16.2\tools\capture\allegro.cfg
#1 Error [ALG0029] Unable to open file "C:\DOCUME~1\?\LOCALS~1\Temp\tmp_pstchip.dat" for writing.
#2 Aborting Netlisting... Please correct the above errors and retry.
Exiting... "D:\Cadence\SPB_16.2\tools\capture\pstswp.exe" -pst -d "e:\new_mcu\原理图\控制板\str912faw44.dsn" -n "E:\NEW_MCU\印制板\B0100" -c "D:\Cadence\SPB_16.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
把文件名换成英文或是拼音再试下
CADENCE不支持中文
Cadence Allegro 培训套装,视频教学,直观易学
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