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CST ports problem-please help
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Hi,
I just designed a simple microstrip transmission line and modelled it in CST. I attached the CST project. According to the microstrip design, epsilon of the substrate is 4.6, substrate thickness is 1.6mm, and line width is 3mm. I verified these calculations in 2 different plugins.
The problem is, S11 is always around 0dB and S21 is below -25dB. And this doesn't change when I change the width to a value than 3mm. I think the problem is with the ports I used. Could you please help me to modify the project so that it would work as expected?
Thanks in advance...
I just designed a simple microstrip transmission line and modelled it in CST. I attached the CST project. According to the microstrip design, epsilon of the substrate is 4.6, substrate thickness is 1.6mm, and line width is 3mm. I verified these calculations in 2 different plugins.
The problem is, S11 is always around 0dB and S21 is below -25dB. And this doesn't change when I change the width to a value than 3mm. I think the problem is with the ports I used. Could you please help me to modify the project so that it would work as expected?
Thanks in advance...
You have to place your discrete ports between ground and trace, you connected only one side to your trace and left the other side floating, there is no loop.
Thanks a lot.
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