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CST warning for lossy material
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hi there
i am simulating a microstrip power divider and in order to have good match between fabricated and simulated results i thought to include dielectric loss and metal loss. i am simulating with FR4 substrate havng loss tangent of 0.022 and instead of using PEC i am using copper.
after simulating i am getting this warning msg "substrate within in the region of port 1 has very high losses. the accuracy may be degraded in this case"
help me to overcome this problem
with regards
lkminz
i am simulating a microstrip power divider and in order to have good match between fabricated and simulated results i thought to include dielectric loss and metal loss. i am simulating with FR4 substrate havng loss tangent of 0.022 and instead of using PEC i am using copper.
after simulating i am getting this warning msg "substrate within in the region of port 1 has very high losses. the accuracy may be degraded in this case"
help me to overcome this problem
with regards
lkminz
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