Slot Charateristics in CST for slotted waveguide array

Hello,

I am designing slotted waveguide Planar array in CST. For array design, i need design curves of slots characteristics.

A longitudinal slot is in resonant condition when its admittance become purely real. I have simulated a slot with different lengths in CST and i am unable to understand the graphs i get. Can anybody explain me these two graphs that at what simulation pass admittance is purely real having no imaginary part.

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